FEDL87V2107-01
OKI Semiconductor
ML87V2107
2.2.5 Frame-Trigger-Synchronous Frame Buffer Output Mode
In frame-trigger-synchronous frame buffer output mode, data is output from this IC by generating output system Sync.
signals (OVS, OHS) out of TRG (frame trigger signal) and OCLK.
OCLK supports external input and it is required to use the same clock as the TRG generation circuit.
Only the 625/50Hz 2:1 and 525/60Hz 2:1 Sync. signals are generated by this IC. OVS and OHS are generated by
dividing OCLK, using IVS as the reference (starting point). If TRG fulfills the standard frame period, TRG becomes
the standard Sync. signal.
If ICLK is asynchronous with OCLK, input and output will be asynchronous with each other.
In this mode, by using TRG that is generated in asynchronous frame buffer output mode, data output is enabled that
uses multiple standard Sync. signals that are frame-synchronized with TRG. This will bring about the multi-channel
frame synchronization effect.
data_s, Sync._s
ICLK_s
data_s, Sync._s
OCLK
TRG
ML87V2107
data_m, Sync._m
ICLK_m
data_m, Sync._m
OCLK_m
OCLK
TRG
ML87V2107
CX
Figure F2-2-5 Example of Frame-Trigger-Synchronous Frame Buffer Output Configuration
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