FEDL674000-02
OKI Semiconductor
ML674000
PIN DESCRIPTION
Primary/
Secondary
Pin Name
I/O
Description
Logic
System
RESET_N
I
I
Reset input
—
—
Negative
Crystal oscillator connection or external clock input.
Connect a crystal oscillator (16 MHz to 33 MHz), if used, to OSC0 and
OSC1_N.
OSC0
Crystal oscillator connection.
OSC1_N
TBE
O
I
—
—
Leave this pin unconnected if using external clock input.
Test pin. Drive at High level.
Negative
Debugging support.
DBGRQ
DBGACK
TCK
I
O
I
Debugging pin. Normally connect to ground.
Debugging pin. Normally leave open.
—
—
—
—
—
—
—
Positive
Positive
—
Debugging pin. Normally connect to ground.
Debugging pin. Normally drive at High level.
Debugging pin. Normally connect to ground.
Debugging pin. Normally drive at High level.
Debugging pin. Normally leave open.
TMS
I
Positive
Negative
Positive
Positive
nTRST
TDI
I
I
TDO
O
General-purpose I/O ports
General-purpose port.
PIOA[15:0]
I/O
Primary
Primary
Positive
Positive
Not available for use as port pins when secondary functions are in use.
General-purpose port.
Not available for use as port pins when secondary functions are in use. Note
that enabling DRAM controller with MODE[2:0] inputs permanently
configures PIOB[15:9] for their secondary functions, making them
unavailable for use as port pins.
PIOB[15:0]
I/O
10/24
OKI [ OKI ELECTRONIC COMPONETS ]
