欢迎访问ic37.com |
会员登录 免费注册
发布采购

ML674000 参数 Datasheet PDF下载

ML674000图片预览
型号: ML674000
PDF下载: 下载PDF文件 查看货源
内容描述: 32位通用型,基于ARM的微控制器 [32-bit General-purpose, ARM-based Microcontroller]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 24 页 / 192 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
 浏览型号ML674000的Datasheet PDF文件第4页浏览型号ML674000的Datasheet PDF文件第5页浏览型号ML674000的Datasheet PDF文件第6页浏览型号ML674000的Datasheet PDF文件第7页浏览型号ML674000的Datasheet PDF文件第9页浏览型号ML674000的Datasheet PDF文件第10页浏览型号ML674000的Datasheet PDF文件第11页浏览型号ML674000的Datasheet PDF文件第12页  
FEDL674000-02
OKI Semiconductor
ML674000
Pin Number
TQFP
LFBGA
Primary Function
Pin Name
I/O
Function
Pin Name
Secondary Function
I/O
Function
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
G13
F11
F10
F12
E12
F13
E10
D12
E13
E11
D11
D13
C12
D10
B12
A12
A11
C10
B11
A10
C9
B10
A9
D9
B9
A8
B8
D8
C8
B7
D7
C7
A7
C6
D6
B6
B5
A6
D5
B4
A5
C5
GND_CORE GND Core ground
VDD_CORE
XA[13]
XA[14]
XA[15]
XA[16]
XA[17]
GND_IO
XA[18]
PIOA[10]
PIOA[11]
PIOA[12]
VDD_IO
PIOA[13]
PIOA[14]
PIOA[15]
XOE_N
XWE_N
GND_IO
XBWE_N[0]
XBWE_N[1]
XROMCS_N
XRAMCS_N
XIOCS_N[0]
XIOCS_N[1]
VDD Core power supply
O
O
O
O
O
External address output
External address output
External address output
External address output
External address output
XA[19]
XA[20]
XA[21]
O
O
O
External address output
External address output
External address output
GND I/O ground
O
External address output
I/O General-purpose port (with interrupt function)
I/O General-purpose port (with interrupt function)
I/O General-purpose port (with interrupt function)
VDD I/O power supply
I/O General-purpose port (with interrupt function)
I/O General-purpose port (with interrupt function)
I/O General-purpose port (with interrupt function)
O
O
Output enable (except SDRAM)
Write enable
XA[22]
XA[23]
XWR
O
O
O
External address output
External address output
External bus data transfer direction
DREQ0
DREQCLR0
I
O
DMA request signal (Ch 0)
DREQ clear signal (Ch 0)
GND I/O ground
O
O
O
O
O
O
Write enable (LSB)
Write enable (MSB)
External ROM chip select
External RAM chip select
I/O bank 0 chip select
I/O bank 1 chip select
GND_CORE GND Core ground
VDD_CORE
PIOB[0]
PIOB[1]
VDD_IO
PIOB[2]
PIOB[3]
PIOB[4]
PIOB[5]
GND_IO
PIOB[6]
PIOB[7]
XBS_N[0]
XBS_N[1]
PIOB[8]
PIOB[9]
PIOB[10]
VDD Core power supply
I/O General-purpose port (with interrupt function)
I/O General-purpose port (with interrupt function)
VDD I/O power supply
I/O General-purpose port (with interrupt function)
I/O General-purpose port (with interrupt function)
I/O General-purpose port (with interrupt function)
I/O General-purpose port (with interrupt function)
GND I/O ground
I/O General-purpose port (with interrupt function)
I/O General-purpose port (with interrupt function)
O
O
External bus byte select (LSB)
External bus byte select (MSB)
DREQ1
DREQCLR1
TCOUT0
TCOUT1
I
O
O
O
DMA request signal (Ch 1)
DREQ clear signal (Ch 1)
DMA Termination Signal (CH 0)
DMA Termination Signal (CH 1)
PWMOUT0
PWMOUT1
O
O
PWM output (Ch 0)
PWM output (Ch 1)
XWAIT
XCAS_N
XRAS_N
I
O
O
WAIT input for IO bank 0
Column address strobe (SDRAM)
Row address strobe (SDRAM/EDO)
I/O General-purpose port (with interrupt function)
I/O General-purpose port (with interrupt function)
I/O General-purpose port (with interrupt function)
8/24