LM91
1.0 Functional Description
(Continued)
shorted to V
CC
or floating then the temperature reading will
be +127˚C, bit 2 (OPEN) of the Status Register will be set. If
the Remote T_CRIT setpoint is set to less than +127˚C then
1.7 COMMUNICATING with the LM91
bit 4 (RTCRIT) of the Status Register will be set which will
activate the T_CRIT_A output, if enabled. If D+ is shorted to
GND or D−, the temperature reading will be 0˚C and bit 2 of
the Status Register will not be set.
20034309
There are 10 data registers in the LM91, selected by the
Command Register. At power-up the Command Register is
set to “00”, the location for the Read Local Temperature
Register. The Command Register latches whatever the last
location it was set to. Reading the Status Register resets
T_CRIT_A. All registers are predefined as read only or write
only. Read and write registers with the same function contain
mirrored data.
A
Write
to the LM91 will always include the address byte and
the command byte. A write to any register requires one data
byte.
Reading
the LM91 can take place either of two ways:
1. If the location latched in the Command Register is cor-
rect (most of the time it is expected that the Command
Register will point to one of the Read Temperature Reg-
isters because that will be the data most frequently read
from the LM91), the read can simply consist of an ad-
dress byte, followed by retrieving the data byte.
2. If the Command Register needs to be set, then an
address byte, command byte, repeat start, and another
address byte will accomplish a read.
The data byte has the most significant bit first. At the end of
a read, the LM91 can accept either Acknowledge or No
Acknowledge from the Master (No Acknowledge is typically
used as a signal for the slave that the Master has read its
last byte).
1.7.1 SMBus TIMEOUT
The LM91 SMBus interface circuitry will be reset to the
SMBus idle state if the SMBData or SMBCLK lines are held
low for more than 40 ms. The LM91 may or may not reset the
state SMBData or SMBCLK if either of these lines are held
low between 25 ms and 40 ms. Holding SMBData or SMB-
CLK low for less than or equal to 25 ms will not reset the
interface circuitry. The LM91 has a built-in internal timer to
guarantee that the interface is reset if the SMBData line were
to get stuck low. This can commonly occur when the master
is reset while the slave is transmitting low. This enhance-
ment to the SMBus TIMEOUT specification ensures error
free performance even in remote systems where complete
power supply shutdown, for reset, is a nuisance. This would
have to occur since many cost effective temperature sensors
such as the LM91 do not have a pin dedicated for reset.
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