SPECIFICATIONS
ELECTRICAL
At VA = VD = VREF+ = 5V ±5%; VA ≥ VD ≥ VREF+; VREF– = AGND = DGND = 0V; CLK = 2MHz external with 50% duty cycle, TA = –40°C to +85°C, after calibration
cycle at any temperature, unless otherwise specified.
ADC7802BP, ADC7802BN
PARAMETER
RESOLUTION
CONDITIONS
MIN
TYP
MAX
UNITS
12
Bits
ANALOG INPUT
Voltage Input Range
Input Capacitance
On State Bias Current
Off State Bias Current
V
REF+ = 5V, VREF– = 0V
0
5
V
50
100
pF
nA
nA
nA
kΩ
MΩ
dB
TA = 25°C
TA = –40°C to +85°C
10
100
On Resistance Multiplexer
Off Resistance Multiplexer
Channel Separation
2
10
92
500Hz
REFERENCE INPUT
For Specified Performance: VREF
+
–
VREF+ ≤ VA
5
0
V
V
V
VREF
(1)
For Derated Performance:
VREF
+
–
4.5
0
VA
1
VREF
V
Input Reference Current
VREF+ = 5V, VREF– = 0V
10
100
µA
THROUGHPUT TIMING
Conversion Time With External Clock (Including
Multiplexer Settling Time and Acquisition Time)
CLK = 2MHz, 50% Duty Cycle
CLK = 1MHz, 50% Duty Cycle
CLK = 500kHz, 50% Duty Cycle
TA = +25°C
8.5
17
34
10
µs
µs
µs
With Internal Clock Using
µs
Recommended Clock Components
TA = –40°C to +85°C
10
500
µs
Hz
mV/µs
ns
ns
(2)
Analog Signal Bandwidth
(2)
Slew Rate
8
Multiplexer Settling Time to 0.01%
Multiplexer Access Time
460
20
ACCURACY
Total Adjusted Error,(3) All Channels
Differential Nonlinearity
No Missing Codes
Gain Error
Gain Error Drift
Offset Error
Offset Error Drift
Channel-to-Channel Mismatch
Power Supply Sensitivity
±1/2
±1/2
LSB
LSB
Guaranteed
±0.2
All Channels
Between Calibration Cycles
All Channels
±1/4
±1/4
±1/4
LSB
ppm/°C
LSB
ppm/°C
LSB
Between Calibration Cycles
±0.2
VA = V D = 4.75V to 5.25V
±1/8
LSB
DIGITAL INPUTS
All Pins Other Than CLK: VIL
VIH
0.8
V
V
µA
µA
V
2.4
3.5
Input Current
TA = +25°C, VIN = 0 to VD
TA = –40°C to +85°C, VIN = 0 to VD
1
10
0.8
CLK Input: VIL
VIH
IIL
IIH
IIH
V
10
1.5
100
µA
mA
nA
Power Down Mode (D3 in SFR HIGH)
DIGITAL OUTPUTS
VOL
VOH
Leakage Current
Output Capacitance
ISINK = 1.6mA
ISOURCE = 200µA
High-Z State, VOUT = 0V to VD
High-Z State
0.4
V
V
µA
pF
4
4
±1
15
POWER SUPPLIES
Supply Voltage for Specified Performance: VA
4.75
4.75
5
5
1
1
10
50
5.25
5.25
2.5
2
V
V
mA
mA
mW
µW
VD
VA ≥ VD
Supply Current: IA
ID
Power Dissipation
Power Down Mode
Logic Input Pins HIGH or LOW
WR = RD = CS = BUSY = HIGH
See Table III, Page 9
TEMPERATURE RANGE
Specification
Storage
–40
–65
+85
+150
°C
°C
NOTES: (1) For (VREF+) – (VREF–) as low as 4.5V, the total error will typically not exceed ±1LSB. (2) Faster signals can be accurately converted by using an external
sample/hold in front of the ADC7802. (3) After calibration cycle, without external adjustment. Includes gain (full scale) error, offset error, integral nonlinearity,
differential nonlinearity, and drift.
®
ADC7802
2
BB [ BURR-BROWN CORPORATION ]
