MAX 5000 Programmable Logic Device Family Data Sheet
Figure 2. MAX 5000 Device Macrocell
Global Clock
Logic Array
To I/O
Control
Block
(One per LAB)
Output Enable
Preset
Programmable
Register
PRN
To I/O
Control
Block
D/T
Q
CLRN
Array Clock
Clear
Macrocell Feedback
I/O Feedback
From I/O
Control
Block
24 Programmable
Interconnect Signals
(Multi-LAB Devices Only)
8 or 20
Dedicated
Inputs
32 or 64
Expander
Product Terms
Additional product terms (called secondary product terms) are used to
control the output enable, preset, clear, and clock signals. Preset and clear
product terms drive the active-low asynchronous preset and
asynchronous clear inputs to the configurable flipflop. The clock product
term allows each register to have an independent clock and supports
positive- and negative-edge-triggered operation. Macrocells that drive an
output pin can use the output enable product term to control the active-
high tri-state buffer in the I/O control block.
The MAX 5000 macrocell configurability makes it possible to efficiently
integrate complete subsystems into a single device.
Clocking Options
Each LAB supports either global or array clocking. Global clocking is
provided by a dedicated clock signal (CLK) that offers fast clock-to-output
delay times. Because each LAB has one global clock, all flipflop clocks
within the LAB can be positive-edge-triggered from the CLKpin. If the CLK
pin is not used as a global clock, it can be used as a high-speed dedicated
input.
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Altera Corporation
ALTERA [ ALTERA CORPORATION ]
