MAX 5000 Programmable Logic Device Family Data Sheet
Macrocells are the primary resource for logic implementation. Additional
logic capability is available from expanders, which can be used to
supplement the capabilities of any macrocell. The expander product-term
array consists of a group of unallocated, inverted product terms that can
be used and shared by all macrocells in the LAB to create combinatorial
and registered logic. These flexible macrocells and shareable expanders
facilitate variable product-term designs without the inflexibility of fixed
product-term architectures. All macrocell outputs are globally routed
within an LAB via the LAB interconnect. The outputs of the macrocells
also feed the I/O control block, which consists of groups of
programmable tri-state buffers and I/O pins. In the EPM5064, EPM5128,
EPM5130, and EPM5192 devices, multiple LABs are connected by a PIA.
All macrocells feed the PIA to provide efficient routing for high-fan-in
designs.
Macrocells
The MAX 5000 macrocell consists of a programmable logic array and an
independently configurable register (see Figure 2). The register can be
programmed to emulate D, T, JK, or SR operation, as a flow-through latch,
or bypassed for combinatorial operation. Combinatorial logic is
implemented in the programmable logic array, in which three product
terms that are ORed together feed one input to an XORgate. The second
input to the XORgate is used for complex XORarithmetic logic functions
and for De Morgan’s inversion. The output of the XORgate feeds the
programmable register or bypasses it for combinatorial operation.
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Altera Corporation
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