VT82C686B
PCI Function 1 Registers – IDE Controller
Configuration Space IDE Header Registers
Configuration Space IDE-Specific Registers (continued)
Offset Configuration Space IDE Registers Default Acc
Offset PCI Configuration Space Header
1-0 Vendor ID
3-2 Device ID
5-4 Command
7-6 Status
Default Acc
RO
RO
RO
RW
RO
RW
RO
RO
—
53-50 UltraDMA Extended Timing Control
54 UltraDMA FIFO Control
55-5F -reserved-
RW
RW
—
1106
0571
0080
0280
nn
85
01
01
00
07070707
06
00
61-60 IDE Primary Sector Size
62-67 -reserved-
RW
—
0200
00
8
9
Revision ID
Programming Interface
Sub Class Code
Base Class Code
-reserved- (cache line size)
Latency Timer
69-68 IDE Secondary Sector Size
69-6F -reserved-
RW
—
0200
00
A
B
C
D
E
F
70 IDE Primary Status
71 IDE Primary Intrpt Control
72-77 -reserved-
00
00
00
RW
RW
—
00
00
00
RW
RO
RO
RO
RO
RO
RO
Header Type
Built In Self Test (BIST)
78 IDE Secondary Status
79 IDE Secondary Intrpt Control
7A-7F -reserved-
00
00
00
RW
RW
—
13-10 Base Address – Pri Data / Command
17-14 Base Address – Pri Control / Status
1B-18 Base Address – Sec Data / Command
1F-1C Base Address – Sec Control / Status
23-20 Base Address – Bus Master Control
24-2F -reserved- (unassigned)
30-33 -reserved- (expan ROM base addr)
34 Capability Pointer
35-3B -reserved- (unassigned)
3C Interrupt Line
3D Interrupt Pin
3E Minimum Grant
3F Maximum Latency
000001F0
000003F4
00000170
00000374
83-80 IDE Primary S/G Descriptor Address 0000 0000 RW
84-87 -reserved- 00
8B-88 IDE Secondary S/G Descriptor Addr 0000 0000 RW
—
8C-BF -reserved-
00
—
0000CC01 RW
00
00
C0
00
0E
00
00
00
—
—
RO
—
RW
RO
RO
RO
C3-C0 PCI PM Block 1
C7-C4 PCI PM Block 2
C8-FF -reserved-
0002 0001 RO
0000 0000 RW
00
—
I/O Registers – IDE Controller (SFF 8038 v1.0 Compliant
Offset IDE I/O Registers Default Acc
0
1
2
3
Primary Channel Command
-reserved-
Primary Channel Status
-reserved-
00
00
00
00
00
00
00
00
00
00
RW
—
WC
—
RW
RW
—
WC
—
4-7 Primary Channel PRD Table Addr
8
9
A
B
Secondary Channel Command
-reserved-
Secondary Channel Status
-reserved-
Configuration Space IDE-Specific Registers
Offset Configuration Space IDE Registers Default Acc
40 IDE Chip Enable
41 IDE Configuration 1
42 IDE Configuration 2
43 IDE FIFO Configuration
44 IDE Miscellaneous Control 1
45 IDE Miscellaneous Control 2
46 IDE Miscellaneous Control 3
4B-48 IDE Drive Timing Control
4C IDE Address Setup Time
4D -reserved- (do not program)
4E-4F -reserved-
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
—
00
06
09
0A
68
C-F Secondary Channel PRD Table Addr
RW
00
C0
A8A8A8A8
FF
00
00
Revision 1.71 June 9, 2000
-31-
Register Overview
ETC [ ETC ]
