Ver 1.3
PRELIMINARY
EAGLE
3.7.11 CRT Overlay & DAC Control Register(CRTOEDAC)
Address : FFE0 1428h
Bit
31 : 16
15
R/W
R
R/W
Description
Default Value
Reserved
-
0b
External Overlay Enable(OVEN) Output Polarity
0 : High Active Signal, 1 : Low Active Signal
Reserved
14
R
-
13 : 12
R/W
External Overlay Enable(OVEN) Dot Clock Delay
00 : -1 Dot Clock(Pixel clock) Delay
01 : 0 Dot Clock(Pixel clock) Delay
10 : +1 Dot Clock(Pixel clock) Delay
11 : +2 Dot Clock(Pixel clock) Delay
Reserved
01b
11
R
-
10 : 8
R/W
External Overlay Enable(OVEN) System(AHB) Clock Delay
000 : 0 System(AHB) Clock Delay
001 : +1 System(AHB) Clock Delay
010 : +2 System(AHB) Clock Delay
011 : +3 System(AHB) Clock Delay
100 : +4 System(AHB) Clock Delay
101 : +5 System(AHB) Clock Delay
110 : +6 System(AHB) Clock Delay
111 : +7 System(AHB) Clock Delay
Reserved
000b
7 : 6
5
R
R/W
-
0b
DAC RED or Composite Channel Input Source Select
0 : Component R
1: Composite
4
R/W
DAC input Dot clock inverting
0b
0 : Non Inverting
1 : Inverting
3
2
1
0
R/W
R/W
R/W
R/W
DAC ALL Channel Power Down mode(High Active)
DAC BLUE Channel Power Down mode(High Active)
DAC GREEN Channel Power Down mode(High Active)
DAC RED( or Composite) Channel Power Down mode(High Active)
1b
1b
1b
1b
3.7.12 CRT VESA Power Management Control Register(CRTPM)
Address : FFE0 142Ch
Bit
31 : 2
1 : 0
R/W
R
R/W
Description
Default Value
Reserved
-
VESA Power Management Control.
----------------------------------------------
00b
1 0
Stage
Vsync Hsync
----------------------------------------------
0 0
0 1
1 0
1 1
On
On
On
Off
On
Stand-by On
Suspend
Off
Off
Off
Off
----------------------------------------------
91
CONFIDENTIAL
Beijing Peak Microtech Co.Ltd.
ETC [ ETC ]
