EAGLE
PRELIMINARY
Ver 1.3
Interrupt Half Address Register (H264IHA)
Interrupt End Address Register (H264IEA)
System Clock Source Select Register (SPLLCKSEL)
System PLL Control Register (SPLLCON)
System PLL Program Register (SPLLPMN)
CRT Clock Source Select Register (CPLLCKSEL)
CRT PLL Control Register (CPLLCON)
CRT PLL Program Register (CPLLPMN)
USB Clock Source Select Register (UPLLCKSEL)
USB PLL Control Register (UPLLCON)
USB PLL Program Register (UPLLPMN)
H264/MJPEG Clock Enable bit Register (HMCLKEN)
FFE0 1CA8h
FFE0 1CACh
FFE0 2000h
FFE0 2004h
FFE0 2008h
FFE0 2010h
FFE0 2014h
FFE0 2018h
FFE0 2020h
FFE0 2024h
FFE0 2028h
FFE0 2030h
FFE0 2400h
FFE0 2404h
FFE0 2408h
FFE0 240Ch
FFE0 2410h
FFE0 2414h
FFE0 2418h
FFE0 241Ch
FFE0 2420h
FFE0 2424h
FFE0 2428h
FFE0 242Ch
FFE0 3000h
FFE0 3004h
FFE0 3008h
FFE0 300Ch
FFE0 3010h
FFE0 3014h
FFE0 3018h
FFE0 301Ch
FFE0 3020h
FFE0 3024h
FFE0 3028h
FFE0 302Ch
FFE0 303Ch
FFE0 3040h
FFE0 3044h
FFE0 3048h
FFE0 304Ch
FFE0 305Ch
FFE0 3060h
FFE0 3064h
FFE0 3068h
FFE0 306Ch
FFE0 307Ch
FFE0 3080h
FFE0 3084h
FFE0 3088h
FFE0 308Ch
FFE0 309Ch
FFE0 30A0h
FFE0 30A4h
FFE0 30A8h
FFE0 30ACh
FFE0 30BCh
FFE0 30C0h
FFE0 30C4h
0h
0h
0h
0h
4230h
0h
0010h
410Dh
0h
0010h
4213h
7h
0h
0800h
0200h
00FFh
00FFh
0200h
0h
0h
0h
0h
-
-
PLL & Power
Manager
SDC Control Register (SDCCON)
SDC Status Register (SDCSTAT)
SDC Clock Divide Register (SDCCD)
SDC Response Time Out Register (SDCRTO)
SDC Read Data Time Out Register (SDCRDTO)
SDC Block Length Register (SDCBL)
SDC Number of Block Register (SDCNOB)
SDC
SDC Interrupt Enable Register (SDCIE)
SDC Command Control Register (SDCCMDCON)
SDC Command Argument Register (SDCCMDA)
SDC Response FIFO Access Register (SDCRFA)
SDC Data FIFO Access Register (SDCDFA)
Sound Data Channel 0 Control Register (SNDCON0)
Sound Data Channel 0 Start Address Set Register (SNDADR0)
Sound Data Cannel 0 Size Set Register (SNDSIZ0)
Sound Data Channel 0 FIFO Buffer Register (SNDBUF0)
Sound Data Channel On / Status Register (SNDCHON)
Sound Data Channel Interrupt Status Register(SNDIRQSTAT)
Sound Mixer Playback Set Register (SNDPLAY)
Sound Data Channel 0 Level Status Register (SNDLEV0)
Sound Data Channel 1 Control Register (SNDCON1)
Sound Data Channel 1 Start Address Set Register (SNDADR1)
Sound Data Cannel 1 Size Set Register (SNDSIZ0)
Sound Data Channel 1 FIFO Buffer Register (SNDBUF1)
Sound Data Channel 1 Level Status Register (SNDLEV1)
Sound Data Channel 2 Control Register (SNDCON2)
Sound Data Channel 2 Start Address Set Register (SNDADR2)
Sound Data Cannel 2 Size Set Register (SNDSIZ0)
Sound Data Channel 2 FIFO Buffer Register (SNDBUF2)
Sound Data Channel 2 Level Status Register (SNDLEV2)
Sound Data Channel 3 Control Register (SNDCON3)
Sound Data Channel 3 Start Address Set Register (SNDADR3)
Sound Data Cannel 3 Size Set Register (SNDSIZ0)
Sound Data Channel 3 FIFO Buffer Register (SNDBUF3)
Sound Data Channel 3 Level Status Register (SNDLEV3)
Sound Data Channel 4 Control Register (SNDCON4)
Sound Data Channel 4 Start Address Set Register (SNDADR4)
Sound Data Cannel 4 Size Set Register (SNDSIZ0)
Sound Data Channel 4 FIFO Buffer Register (SNDBUF4)
Sound Data Channel 4 Level Status Register (SNDLEV4)
Sound Data Channel 5 Control Register (SNDCON5)
Sound Data Channel 5 Start Address Set Register (SNDADR5)
Sound Data Cannel 5 Size Set Register (SNDSIZ0)
Sound Data Channel 5 FIFO Buffer Register (SNDBUF5)
Sound Data Channel 5 Level Status Register (SNDLEV5)
Sound Data Channel 6 Control Register (SNDCON6)
Sound Data Channel 6 Start Address Set Register (SNDADR6)
00FF 00FFh
0h
0h
0h
0h
0h
0h
0h
00FF 00FFh
0h
0h
0h
0h
00FF 00FFh
0h
0h
0h
0h
Sound Mixer
00FF 00FFh
0h
0h
0h
0h
00FF 00FFh
0h
0h
0h
0h
00FF 00FFh
0h
0h
0h
0h
00FF 00FFh
0h
Beijing Peak Microtech Co.Ltd.
CONFIDENTIAL
38
ETC [ ETC ]
