EAGLE
PRELIMINARY
Ver 1.3
Port Output Data Low Level Setting Register (PBOL)
Port Input Data Level Register (PBILEV)
Port Direction Register (PCDIR)
Port Direction Output Mode Register (PCOUT)
Port Direction Input Mode Register (PCIN)
Port Output Data Level Register (PCOLEV)
Port Output Data High Level Setting Register (PCOH)
Port Output Data Low Level Setting Register (PCOL)
Port Input Data Level Register (PCILEV)
Port Direction Register (PDDIR)
Port Direction Output Mode Register (PDOUT)
Port Direction Input Mode Register (PDIN)
Port Output Data Level Register (PDOLEV)
Port Output Data High Level Setting Register (PDOH)
Port Output Data Low Level Setting Register (PDOL)
Port Input Data Level Register (PDILEV)
RTC Control Register (RTCCON)
FFE0 A42Ch
FFE0 A430h
FFE0 A440h
FFE0 A440h
FFE0 A444h
FFE0 A448h
FFE0 A448h
FFE0 A44Ch
FFE0 A450h
FFE0 A460h
FFE0 A460h
FFE0 A464h
FFE0 A468h
FFE0 A468h
FFE0 A46Ch
FFE0 A470h
FFE0 A800h
FFE0 A804h
FFE0 A808h
FFE0 A80Ch
FFE0 A810h
FFE0 A814h
FFE0 A818h
FFE0 A81Ch
FFE0 AC00h
FFE0 AC04h
FFE0 AC08h
FFE0 AC0Ch
FFE0 AC10h
FFE0 AC14h
FFE0 B000h
FFE0 B004h
FFE0 B008h
FFE0 B00Ch
FFE0 B010h
FFE0 B014h
FFE0 B018h
FFE0 B01Ch
FFE1 0234h
FFE1 0238h
FFE1 023Ch
FFE1 0240h
FFE1 0800h
~FFE1 0830h
FFE1 0C00h
~FFE1 0C30h
FFE1 2800h
~FFE1 2A88h
FFE1 3000h
~FFE1 3288h
FFE1 4800h
~FFE1 4830h
FFE1 5000h
~FFE1 5030h
FFE1 6800h
~FFE1 6A88h
FFE1 7000h
~FFE1 7288h
FFE1 8000h
-
0h
0h
-
-
0h
-
-
0h
0h
-
-
0h
-
-
0h
0h
0h
0h
0h
0h
0h
0h
0h
0h
0201h
0h
0h
0h
0h
0h
00FFh
0h
0h
0001h
0h
0h
0h
0h
0h
0h
0h
0h
SEC Register (RTCSEC)
MIN Register (RTCMIN)
HOUR Register (RTCHOUR
DAY Register (RTCDAY)
WEEK Register (RTCWEEK)
MONTH Register (RTCMON)
YEAR Register (RTCYEAR)
TWI Control Register (TWICON)
TWI Status Register (TWISTAT)
TWI Address Register(TWIADDR)
TWI Data Register ( TWIDATA)
TWI Baud-rate 0 Register (TWIBR0 )
TWI Baud-rate 1 Register (TWIBR1 )
SPI Control Register (SPICON)
RTC
TWI
SPI
SPI Baud Rate Register (SPIBR)
SPI Status Register (SPISTAT)
SPI Data Register (SPID)
SPI SSX Control Register (SPISCON)
SPI Interrupt Mask Register (SPIIM)
SPI Transfer Mode Register (SPITM)
SPI Clock Select Register (SPICS)
JPEG DECODER MCU WIDTH Register (JDMWIDTH)
JPEG DECODER MCU HEIGHT Register (JDMHEIGHT)
JPEG DECODER Quantization Scale Control Register (JDQSC)
JPEG DECODER Command Control Register (JDCOMCON)
JPEG DECODER YDC NODE Table (JDYDCNT)
JPEG DECODER YDC LEAF Table (JDYDCLT)
JPEG DECODER YAC NODE Table (JDYACNT)
JPEG DECODER YAC LEAF Table (JDYACLT)
JPEG DECODER UVDC NODE Table (JDUVDCNT)
JPEG DECODER UVDC LEAF Table (JDUVDCLT)
JPEG DECODER UVAC NODE Table (JDUVACNT)
JPEG DECODER UVAC LEAF Table (JDUVACLT)
JPEG DECODER STATUS Register (JDSTAT)
0h
0h
0h
0h
0h
0h
0h
0h
JPEG Decoder
Beijing Peak Microtech Co.Ltd.
CONFIDENTIAL
42
ETC [ ETC ]
