SLA6845M
■Internal Block Diagram
■Typical Connection Diagram
Dboot Rboot
2
3
4
11
10
VB1 VB2 VB3
5
+
VCC1
HO1
HS1
1
+
HO2
HS2
VB1
VB2
VB3
13
M
9
8
7
HIN1
HIN2
HIN3
VBB1
VBB2
+
+
HO3
HS3
Cs
VCC1
12
14
6
COM1
UVLO
UVLO
UVLO
UVLO
HVIC
HIN1
HIN2
HIN3
23
Input
Logic
High Side
Level Shift Driver
VCC2
LO1
LO2
LO3
COM1
U
V
24
17
15
VCC2
VREG
W1
20
19
W2
LIN1
LIN2
LIN3
7.5V
Reg.
Terminal
Detect
UVLO
18
16
LIN1
LIN2
LIN3
Input
Logic
Low Side Driver
VREG
CC
LS3
LS2
COM2
FO
22
21
FO
LS1
COM2
RS
LVIC
15V
+
The input pulldown resistor is built into the IC (about 100 kΩ).
However, if the input is expected to be unstable or to fluctuate greatly,
it needs to be reinforced using an external resistor.
Attach capacitors near the IC. Attach a ceramic capacitor in parallel
with the electrolytic capacitor if too much noise is generated.
■External Dimensions (ZIP24 with Fin [SLA24Pin])
(Unit : mm)
31 0.2
31 0.2
31 0.2
4.8 0.2
1.7 0.1
4.8 0.2
1.7 0.1
24.4 0.2
16.4 0.2
Gate burr
24.4 0.2
16.4 0.2
Gate burr
24.4 0.2
4.8 0.2
1.7 0.1
φ3.2 0.15 X 3.8
3.2 0.15 X 3.8
3.2 0.15
16.4 0.2
φ3.2 0.15
φ3.2 0.15
φ3.2 0.15x3.8
JAPAN
JAPAN
Part No.
Part No.
2.45 0.2
(Measured at the root)
2.45 0.2
(Measured at the root)
Lot No.
Lot No.
4-(R1)
4-(R1)
2.45 0.1
R-end
R-end
(Measured at the root)
+0.15
0.6
–0.05
+0.15
–0.05
+0.15
–0.05
+0.15
–0.05
0.5
0.6
0.5
23 X P1.27 0.7=29.21
31.3 0.2
1
4.5 0.7
23 X P1.27 0.7=29.21
31.3 0.2
1
4.5 0.7
+0.2
–0.1
0.6
(Measured at the tip)
(Measured at the tip)
3
0.3
23xP1.27 0.2=29.21 0.5
(Measured at the tip)
(Including the resin burr)
(Measured at the tip)
(Including the resin burr)
2
4
6
8
10
12 14
13
16
18
20
22
24
2
4
6
8
10
12 14
13
16
18
20
22
24
1
3
5
7
9
11
15
17
19
21
23
1
3
5
7
9
11
15
17
19
21
23
Forming No. 2171
Forming No. 2175
Forming No. 2178
Product Mass: Approx. 6.2 g
ICs
133
ETC [ ETC ]
