RTL8211C & RTL8211CL
Datasheet
7.3.7. RXERC (Receive Error Counter, Address 0x15)
Table 37. RXERC (Receive Error Counter, Address 0x15)
Bit
Name
RW
Default
Description
21.15:0 Receive Error Count
RC
0x0000
Receive Error Count.
Note: The RXERC register is read-cleared after a read.
7.3.8. LEDCR (LED Control Register, Address 0x18)
Table 38. LEDCR (LED Control Register, Address 0x18)
Bit
Name
RW
Default
Description
24.15 Disable LED
RW
0
0: Enable
1: Disable
24.14:12 LED Pulse Stretch
Duration
RW
010
000: No pulse stretching
010: 42ms to 84ms
100: 170ms to 340ms
110: 670ms to 1.3s
Reserved.
001: 21ms to 42ms
011: 84ms to 170ms
101: 340ms to 670ms
111: 1.3s to 2.7s
24.11 RSVD
24.10:8 RSVD
24.7:4 RSVD
RW
RW
RW
RW
0
111
0100
0
Reserved.
Reserved.
24.3
LEDLINK Control
1: Link and Speed Indication by combination of LEDs
0: Link and Speed Indication by specific LED
Refer to section 6.8 LED Configuration (only for RTL8211C).
1: Full Duplex Indication
24.2
24.1
24.0
LEDDUP Control
LEDRX Control
LEDTX Control
RW
RW
RW
0
0
0
0: Full Duplex/Collision Indication
1: Rx Activity/Link Indication
0: Rx Activity Indication only
1: Tx or Rx Activity/Link Indication
0: Tx Activity Indication only
7.3.9. PAGSEL (Page Select Register, Address 0x1F)
Table 39. PAGSEL (Page Select Register, Address 0x1F)
Bit
Name
RW
RW
RW
Default
0
Description
31.15:3 RSVD
31.2:0 Pagesel
Reserved.
000
Page Select Signal.
000: Page 0 (default page)
010: Page 2
001: Page 1
011: Page 3
100: Page 4
Integrated 10/100/1000 Gigabit Ethernet Transceiver
33
Track ID: JATR-1076-21 Rev. 1.3
ETC [ ETC ]
