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LXT350PE 参数 Datasheet PDF下载

LXT350PE图片预览
型号: LXT350PE
PDF下载: 下载PDF文件 查看货源
内容描述: PCM收发器|单| CEPT PCM - 30 / E - 1 | CMOS | LDCC | 28PIN |塑料\n [PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|LDCC|28PIN|PLASTIC ]
分类和应用: 电信集成电路PC
文件页数/大小: 50 页 / 1130 K
品牌: ETC [ ETC ]
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T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation — LXT350
.
Table 5.
Input to Pin
1
Mode
Low
Low
Low
High
High
High
Open
Open
Open
TRSTE
Low
High
Open
Low
High
Open
Low
High
Open
Control and Operational Mode Selection
Mode of Operation
Hardware
On
On
On
Off
Off
Off
On
On
On
Host
2
Off
Off
Off
On
On
On
Off
Off
Off
Unipolar
Off
Off
On
x
x
x
On
On
On
Bipolar
On
On
Off
x
x
x
Off
Off
Off
AMI Enc/Dec
Off
3
Off
3
On
x
x
x
Off
Off
Off
B8ZS/HDB3
Encoder/Decoder
Off
Off
Off
x
x
x
On
On
On
All Outputs Tristated
No
Yes
No
No
Yes
No
No
Yes
No
1. Open is either a midrange voltage or the pin is floating.
2. In Host mode, the contents of register CR1 determine the operation mode.
3. Encoding is done externally.
2.7
Diagnostic Mode Operation
The LXT350 offers multiple diagnostic modes as listed in
Note that various diagnostic
modes are only available in Host mode. In Hardware mode, the diagnostic modes are selected by a
combination of pin settings. In Host mode, the diagnostic modes are selected by writing
appropriate register bits. The following paragraphs provide details of the diagnostic modes.
Table 6.
Diagnostic Mode Availability
Availability
1
Diagnostic Mode
Hardware
Loopback Modes
Host
Host Mode
Maskable
2
Local Loopback (LLOOP)
Analog Loopback (ALOOP)
Remote Loopback (RLOOP)
Dual Loopback (DLOOP)
Internal Data Pattern Generation
Transmit All Ones (TAOS)
Quasi-Random Signal Source (QRSS)
Error Insertion and Detection
Bipolar Violation Insertion (INSBPV)
Logic Error Insertion (INSLER)
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
Yes
Yes
Yes
Yes
No
Yes
Yes
Yes
Yes
Yes
No
No
1. In Hardware mode, a combination of pin settings selects the Diagnostics Modes. In Host mode, writing appropriate bits in the
Control Registers selects the Diagnostic Modes.
2. Host mode allows interrupt masking by writing a “1” to the corresponding bit in the Interrupt Clear Register.
Datasheet
19