IP1001 LF
Data Sheet
4.14 PHY Link Status Register (Reg17)
HW
Reset
SW
Reset
Bit
Name
Description
Type
17[8:0]
17.9
Reserved
RO
RO
0
0
Jabber Detected 0: 10Base Jabber not detected
1: 10Base Jabber detected
17.10
17.11
APS_Sleep
0: Normal Operation
1: APS sleep mode is entered
RO
RO
0
0
MDI/MDIX
0: MDI
1: MDIX
MDI
1G
MDIX
100M 10M 1G
100M 10M
MDI0 A
TX
RX
--
TX
RX
--
B
A
D
C
RX
TX
--
RX
TX
--
MDI1 B
MDI2 C
MDI3 D
--
--
--
--
17.12
Link_Duplex
0: link at half duplex
1: link at full duplex
It is valid only if bit 15 is 1.
RO
RO
0
0
17[14:13] Link_Speed[1:0] 2’b00: link at 10Base-T
2’b01: link at 100Base-TX
2’b10: link at 1000Base-T
2’b11: Reserved
It is valid only if bit 15 is 1.
17.15
Link_Status
1: link up
RO
0
0: link down
Register 18~19 are reserved registers. User is inhibited to access to these registers. It may introduce
abnormal function to write these registers.
40/48
Dec. 18, 2007
IP1001-DS-R06
Copyright © 2006, IC Plus Corp.
ETC [ ETC ]
