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IP1001LF 参数 Datasheet PDF下载

IP1001LF图片预览
型号: IP1001LF
PDF下载: 下载PDF文件 查看货源
内容描述: 集成10/100/1000千兆以太网收发器 [Integrated 10/100/1000 Gigabit Ethernet Transceiver]
分类和应用: 以太网局域网(LAN)标准
文件页数/大小: 48 页 / 625 K
品牌: ETC [ ETC ]
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IP1001 LF  
Data Sheet  
Pin description (continued)  
Pin no.  
Label  
Type  
I
Description  
Miscellaneous  
33  
X1  
Reference Clock.  
25 MHz crystal reference or oscillator input.  
Connects to crystal to provide the 25MHz crystal input. If a  
25MHz oscillator is used, connect X1 to the oscillator’s output.  
The input voltage of this pin should not exceed 1.8V. A voltage  
divider formed by 2 resistors is recommended if the output  
voltage of oscillator is over 1.8V. Please refer to the Crystal  
Specifications in detail.  
34  
35  
X2  
O
I
Reference Clock.  
25 MHz crystal reference.  
Hardware reset  
Active low.  
RESET#  
IP1001 enters reset state when this pin is pulled low.  
37  
10  
IPL  
O
It is used for scan test only. It should be left open for normal  
operation.  
NC_TEST  
CLK_OUT  
125M clock output  
It is used by external MAC device. This signal is always active  
after reset.  
25  
17  
CAP  
Capacitor pin  
It should be connected to GND through an external 10uF  
capacitor. It is used to stabilize the internal analog power.  
R_SET  
I
Band gap Reference  
Add an external 6.19kΩ±1% resistor between this pin and  
GND. IP1001 utilizes this resistor to set the current source.  
14/48  
Dec. 18, 2007  
IP1001-DS-R06  
Copyright © 2006, IC Plus Corp.  
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