IP1001 LF
Data Sheet
Pin no.
Label
Type
Description
MAC Interface
GMII
RGMII
MII
45,44,42,41 RXD[3:0] RXD[3:0] RXD[3:0] O
GMII/RGMII/MII Receive Data
Please see the pin description of pin 39.
53
RX_ER --
RX_ER
O
GMII and MII Receive Error
RX_ER shares the same pin with PHY_ADDR2.
I/F
MDI Description
speed
Gigabit A “high” state present on this
pin indicates received data
error or carrier extension. It is
synchronous to RX_CLK
100Mbps A “high” state present on this
, 10Mbps pin indicates received data
error. It is synchronous to
RX_CLK
GMII
Mode
Gigabit, Not used.
RGMII 100Mbps,
Mode 10Mbps
7
8
CRS
COL
--
--
CRS
COL
IPH/O GMII/MII Carrier Sense
It asserts during either the transmission or the
reception.
CRS shares the same pin with PHY_ADDR1.
IPH/O GMII/MII Collision
If IP1001 operates in half mode, it asserts when both
transmission and reception are running. If IP1001
works in full duplex mode, COL is always idle (logic
low).
COL shares the same pin with PHY_ADDR0.
10/48
Dec. 18, 2007
IP1001-DS-R06
Copyright © 2006, IC Plus Corp.
ETC [ ETC ]
