PIC12F510/16F506
FIGURE 5-8:
BLOCK DIAGRAM OF
RB5/GP5
FIGURE 5-9:
BLOCK DIAGRAM OF
RC0/RC1
Data
Bus
D
Data
Bus
Q
Q
Data
Latch
D
Q
Q
I/O
pin(1)
WR
Data
Latch
Port
I/O
pin(1)
WR
Port
CK
CK
W
Reg
W
Reg
D
Q
Q
TRIS
Latch
D
Q
Q
TRIS
Latch
TRIS ‘f’
CK
TRIS ‘f’
CK
Reset
Reset
Comp Pin Enable
(Note 2)
RD Port
Oscillator
Circuit
OSC2
RD Port
COMP2
Note 1: I/O pins have protection diodes to VDD and
VSS.
Note 1: I/O pins have protection diodes to VDD and
2: Input mode is disabled when pin is used for
VSS.
oscillator.
© 2006 Microchip Technology Inc.
Preliminary
DS41268B-page 31
ETC [ ETC ]
