PIC12F510/16F506
FIGURE 5-4:
BLOCK DIAGRAM OF GP2
FIGURE 5-5:
BLOCK DIAGRAM OF RB2
C1OUT
C1OUT
0
1
0
1
(1)
(1)
I/O Pin
I/O Pin
Data
Bus
D
Data
Bus
Q
Q
D
Q
Data
Latch
Data
Latch
WR
WR
Port
Port
Q
CK
CK
C1OUTEN
Q
TRIS
Latch
C1OUTEN
W
Reg
W
Reg
D
D
Q
TRIS
Latch
TRIS ‘f’
TRIS ‘f’
Q
Q
CK
CK
Reset
Reset
T0CS
ADC Pin Enable
C1T0CS
ADC Pin Enable
RD Port
T0CKI
RD Port
ADC
ADC
Note 1: I/O pins have protection diodes to VDD and
Note 1: I/O pins have protection diodes to VDD and
VSS.
VSS.
© 2006 Microchip Technology Inc.
Preliminary
DS41268B-page 29
ETC [ ETC ]
