Data Sheet
June 2002
TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
22 Cross Connect (XC) Block Functional Description (continued)
22.6.5 Framer Interface
The framer block can pass through a total bandwidth of one DS3. This may be formed from 28 DS1s or 21 E1s, or
any mix where a group of four adjacent DS1 channels may be substituted by three E1s. The DS1 or E1 channels
can be cross connected to the M13 MUX, VT mapper, external I/O interface, or test interface. The framer block pro-
vides extensive per-link loopback capability based on DS1/E1 standards.
As previously stated, special channels for AIS, RAI, frame sync, and signaling are enabled when the framer is
cross connected to the VT mapper.
The framer presents six interfaces to the cross connect as shown in Figure 83 on page 553. Although somewhat
flexible, most applications will cross connect the framer interfaces FRM_TP_T (XC1—source ID = 010) and
FRM_RP_R (XC1—destination = XC_RP_RDATA[1—28][7:0] (Table 464 on page 328)) to the M13 MUX or VT
mapper. If desired, the digital jitter attenuators may be inserted in this connection.
An example of an exception to this rule is the framer-only application where the Supermapper is used as a block of
28 framers with a CHI system interface. The 28 framers would interface line interface units with FRM_TP_T and
FRM_RP_R and the system with FRM_TS and FRM_RS entirely through the multifunction system interface device
pins.
Either end of the framer block may be configured to interface to line interface units as shown in Figure 86. In a
framer-only application, the FRM_TP_T and FRM_RP_R framer block interfaces with the LIUs. The FRM_RP_T
and FRM_TP_R framer block interfaces the LIUs in a transport application. If a dual-rail or bipolar LIU interface is
desired, the sync line is used as the negative-rail data.
The user configures the framer block connectivity by simply loading the appropriate source IDs into the
XC_TP_RDATA[1—28][7:0] (Table 468 on page 329), XC_RP_RDATA[1—28][7:0], and XC_RS_D[1—28][7:0]
(Table 469 on page 329) bytes of the framer crosspoint configuration registers: XC_FTP_SRC[1—28][7:0],
XC_FRP_SRC[1—28][7:0], and XC_FRS_SRC[1—28][7:0], respectively.
XC
EXTERNAL I/O
XC_TP_RDATA[1—28][7:0]
3x28
FRM
FRM_TP_R
XC_TP_RDATA
XC_TP_RCLK
XC_TP_RFS
LINERXDATA
LINERXCLK
3x29
FRM_RP_R
3x28
LINERXSYNC
XC_RP_RDATA
XC_RP_RCLK
XC_RP_RFS
XC_RP_RDATA[1—28][7:0]
FRM_TP_T
FRM_TP_TDATA
FRM_TP_TCLK
FRM_TP_TFS
3x28
3x28
LINETXDATA
LINETXCLK
XC_PDATA[1—29][7:0]
3x29
FRM_RP_T
FRM_RP_TDATA
FRM_RP_TCLK
FRM_RP_TFS
LINETXSYNC
XC_SYNC[1—29][7:0]
XC1
5-9184(F)r.1
Figure 86. Framer Line Interface Cross Connect
Agere Systems Inc.
561
ETC [ ETC ]
