Data Sheet
June 2002
TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
17 TMUX Functional Description (continued)
The TOAC channel consists of the following signals:
■ A clock signal sourced by the device pin, RTOACCLK (external output pin AD1). The clock frequency depends
on the values of TMUX_RTOAC_D13MODE and TMUX_RTOAC_D412MODE. See Table 534.
■ A data signal out of RTOACDATA (external output pin AD3). The data rate and the values transmitted depend on
the values of TMUX_RTOAC_D13MODE and TMUX_RTOAC_D412MODE. See Table 534.
■ An 8 kHz synchronization signal, out to output pin, RTOACSYNC (external output pin AA5). The sync signal is
normally low. During the last clock period of each frame coincident with the least significant bit of the last byte
(the eighty-first byte for all TOH modes), the sync signal is driven high.
Table 534. Receive TOAC Modes
TOAC Mode TMUX_RTOAC_D13MODE TMUX_RTOAC_D412MODE Number of Data
Clock Rate
Value
Value
Bytes per Frame
DCC1—DCC3
DCC4—DCC12
Full TOH Mode
1
0
0
X
1
0
3
9
192 kHz
576 kHz
81
5.184 MHz
Receive TOAC DCC1—DCC3 Mode. In this mode, DCC bytes 1 to 3 are transmitted serially on the data pin. The
clock rate is 192 kHz. The data bytes are transmitted MSB first, and the data bytes are driven out in sequential
order: DCC1, DCC2, and DCC3. The data signal is partitioned into frames of 3 bytes with a repetition rate of 8 kHz.
Receive TOAC DCC4—DCC12 Mode. In this mode, DCC bytes 4—12 are transmitted serially on the data output.
The clock rate is 576 kHz. The data bytes are transmitted MSB first, and the data bytes are driven out in sequential
order: DCC4, DCC5, DCC6, DCC7, DCC8, DCC9, DCC10, DCC11, and DCC12. The data signal is partitioned into
frames of 9 bytes. The frame repetition rate is 8 kHz.
Receive TOAC Full TOH Access Mode. In this mode, the data signal is partitioned into frames of 81 bytes. The
frame repetition rate is 8 kHz. Each byte consists of 8 bits that are transmitted/received most significant bit first.
The MSB of the first byte of each frame contains an odd/even parity bit over the 648 bits of the previous frame. The
remaining 7 bits of this byte are not specified.
Bytes shown in Table 535 summarize the access capabilities of the receive TAOC in full access mode. The trans-
port overhead bytes shown in this table are always dropped by the receive side. There is programmability on the
transmit side regarding the insertion of these bytes. Bytes indicated in bold type are not specified in the standard,
but are available on the receive TOAC data signal.
Table 535. Transport Overhead Byte Access—Receive Direction
OH Parity A1-2
A1-3
B1-3
D1-3
H1-3
B2-3
D4-3
D7-3
D10-3
Z1-3
A2-1
E1
A2-2
E1-2
D2-2
H2-2
K1-2
D5-2
D8-2
D11-2
Z2-2
A2-3
E1-3
D2-3
H2-3
K1-3
D5-3
D8-3
D11-3
M1
J0
Z0-2
F1-2
D3-2
H3-2
K2-2
D6-2
D9-2
D12-2
E2-2
Z0-3
F1-3
D3-3
H3-3
K2-3
D6-3
D9-3
D12-3
E2-3
B1
B1-2
D1-2
H1-2
B2-2
D4-2
D7-2
D10-2
Z1-2
F1
D1
D2
D3
H3
K2
D6
D9
D12
E2
H1-1
B2-1
D4
H2
K1
D5
D7
D8
D10
S1
D11
Z2-1
Agere Systems Inc.
379
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