TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Data Sheet
June 2002
13 Cross Connect (XC) Registers (continued)
Table 470. XC_TPM_SRC[1—4], XC1 Test-Pattern Monitor Source Configuration (R/W)
Address Bit
Name
Function
Reset
Default
0x50080 15:8
RSVD
Reserved.
0x00
7:0 XC_TPM_DS1_DATA[7:0] Source Identifier for TPM DS1 Data Pattern. Source
0xFF
(SOURCE_ID)
identifier for test-pattern monitor (TPM) DS1 test channel
inputs.
(invalid)
0x50081 15:8
RSVD
Reserved.
0x00
0xFF
7:0 XC_TPM_DS1_IDLE[7:0] Source Identifier for TPM DS1 Idle Pattern. Source
(SOURCE_ID)
identifier for TPM DS1 idle channel inputs.
(invalid)
0x00
0x50082 15:8
7:0
RSVD
Reserved.
XC_TPM_E1_DATA[7:0] Source Identifier for TPM E1 Data Pattern. Source
0xFF
(SOURCE_ID)
identifier for TPM E1 test channel inputs.
(invalid)
0x0000
0x50083 15:0
RSVD
Reserved.
The DS2 crosspoint’s connectivity is determined by a smaller set of source2 identifiers (SOURCE2_IDs), one for
each channel leaving the DS2 crosspoint switch XC2. A DS2 SOURCE2_ID is therefore defined as follows:
Bit
7
6
5
4
3
2
1
0
SOURCE2_ID
0
SOURCE2_BLOCK[1:0]
CHANNEL2_ID[4:0]
The SOURCE2_BLOCK is defined as follows:
Index
00
Block2 Identifier
TPG (DS2 Test-Pattern Generator)
M13:M12 MUX
01
10
M13:M23 DeMUX
11
External I/O
The CHANNEL2_ID typically ranges from 1 to 7. For test data (SOURCE2_BLOCK = 0), value 4 represents the
DS2 test pattern. For DS2 signals routed from external pins to the input of M23 MUX or TPM, the CHANNEL2_ID
can range from 1 to 29.
Table 471. XC2_M12_SRC[1—7], XC2 M12 DS2 Clock and Data Source Configuration (R/W)
Address Bit
Name
Function
Reset
Default
0x50090 15:8 XC2_DS2M12CLK Source Identifier for High-Speed DS2 Clock Input to M12
0x0040
(invalid)
—
[1—7][7:0]
Multiplexers Connection. DS2 clock input to M12 multiplex-
0x50096
(SOURCE_ID)
ers, see Section 20.5.1 M12 Multiplexers, on page 467.
7:0 XC2_M21[1—7][7:0] Source Identifier for High-Speed DS2 Data and Clock
(SOURCE_ID)
Connection. DS2 data and clock inputs to M12 demultiplex-
ers, see Section 22.7.3 on page 567.
Table 472. XC2_M23_SRC[1—7], XC2 M23 DS2 Data Source Configuration (R/W)
Address Bit
Name
Function
Reset
Default
0x500A0 15:8
RSVD
Reserved.
0x0040
(invalid)
—
7:0
XC2_MDS2M23DATA
[1—7][7:0]
Source Identifier for M23 Input DS2 Signals Connec-
tion. When SOURCE2_BLOCK = 11, CHANNEL2_ID
can range from 1 to 29.
0x500A6
(SOURCE2_ID)
330
Agere Systems Inc.
ETC [ ETC ]
