Data Sheet
June 2002
TMXF28155 Supermapper
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
13 Cross Connect (XC) Registers (continued)
13.1 Cross Connect Register Descriptions
Table 460. XC_ID_R, XC Global Register 1 (RO)
Address
Bit
Name
Function
Reset
Default
0x50000 15:11
RSVD
Reserved.
0x0005
10:8
7:0
XC_VERSION[2:0] Version. These bits identify the version number of the XC.
XC_ID[7:0]
XC_ID. XC_ID register returns a fixed value (0x05) when
read.
Table 461. XC_CHI_MODE1_R, XC System Interface Global Register 1 (R/W)
Address Bit
Name
Function
Reset
Default
0x5000E 15:3
RSVD
RSVD
Reserved.
Reserved. Must write to 0.
0x0000
2
1
XC_SYNC_FOR_DATA Sync for Data. This bit should set to 1 if the transmit sys-
tem interface is in use (CHI, PSB, and NSMI). Setting this
bit allows the external I/O pins LINETXSYNC[29—1] to
output transmit system data. Otherwise, set to 0.
0
XC_SI_CHI
PSB/CHI. This bit should be set to 1 if the transmit system
interface is in PSB mode; otherwise, 0 in CHI mode.
Table 462. XC_CHI_MODE2_R, XC System Interface Global Register 2 (R/W)
Address
Bit
Name
Function
Reset
Default
0x5000F 15:14
RSVD
Reserved.
0x0000
13:0 XC_CHI_MODE[1—7][1:0] CHI Mode. The 28 transmit system links are broken
down into seven groups of four. Each group is con-
trolled by 2 bits, XC_CHI_MODE[1—7][1:0].
XC_CHI_MODE[1—7][1:0] controls the group of links
4i – 3, 4i – 2, 4i – 1, and 4i, where i = 1 to 7. The defini-
tion of CHI_MODE[1—7][1:0] is as follows:
00 = all four links within the group are normal outputs at
2 Mbits/s or 4 Mbits/s.
01 = links 4i – 3 and 4i – 2 are normal outputs; links
4i – 1 and 4i are combined into a single output on 4i;
and output 4i – 1 is used as T1/E1 line output.
10 = links 4i – 1 and 4i are combined into a single output
on 4i; links 4i – 3 and 4i – 2 are combined into a
single output on 4i – 2; and outputs 4i – 1 and
4i – 3 are used as T1/E1 line outputs.
11 = all four links are combined into a single output on 4i;
the other three outputs are used as T1/E1 line
outputs.
Agere Systems Inc.
327