HY29F800
AC CHARACTERISTICS
Read Operations
Parameter
Speed Option
- 55 - 70 - 90 - 12
Description
Test Setup
Unit
JEDEC
Std
tAVAV
tRC Read Cycle Time 1
Min 55
70
90
120
ns
ns
CE# = VIL
OE# = VIL
tAVQV
tACC Address to Output Delay
Max 55
70
90
120
tELQV
tEHQZ
tGLQV
tGHQZ
tCE Chip Enable to Output Delay
tDF Chip Enable to Output High Z1
tOE Output Enable to Output Delay
tDF Output Enable to Output High Z1
OE# = VIL Max 55
Max 20
70
20
30
20
90
20
35
20
120
30
ns
ns
ns
ns
ns
CE# = VIL Max 30
Max 20
50
30
Read
Min
0
Output Enable
tOEH
Toggle and
Data# Polling
Hold Time 1
Min
Min
10
ns
ns
Output Hold Time from Addresses, CE#
or OE#, Whichever Occurs First
tAXQX
tOH
0
1
Notes:
1. Not 100% tested.
2. See Figure 11 and Table 7 for test conditions.
tRC
Addresses
CE#
Addresses Stable
tACC
tOE
OE#
tOEH
tDF
WE#
Outputs
RESET#
tCE
tOH
Output Valid
RY/BY#
0 V
Figure 13. Read Operation Timings
Rev. 4.0/Jan. 00
24
ETC [ ETC ]
