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HD6433846XXXH 参数 Datasheet PDF下载

HD6433846XXXH图片预览
型号: HD6433846XXXH
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器\n [Microcontroller ]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 524 页 / 1465 K
品牌: ETC [ ETC ]
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Bit 2: Transmit end (TEND)  
Bit 2 indicates that bit TDRE is set to 1 when the last bit of a transmit character is sent.  
Bit 2 is a read-only bit and cannot be modified.  
Bit 2  
TEND  
Description  
0
Transmission in progress  
Clearing conditions:  
After reading TDRE = 1, cleared by writing 0 to TDRE  
When data is written to TDR by an instruction  
1
Transmission ended  
(initial value)  
Setting conditions:  
When bit TE in SCR3 is cleared to 0  
When bit TDRE is set to 1 when the last bit of a transmit character is  
sent  
Bit 1: Multiprocessor bit receive (MPBR)  
Bit 1 stores the multiprocessor bit in a receive character during multiprocessor format reception in  
asynchronous mode.  
Bit 1 is a read-only bit and cannot be modified.  
Bit 1  
MPBR  
Description  
0
Data in which the multiprocessor bit is 0 has been received*  
Data in which the multiprocessor bit is 1 has been received  
(initial value)  
1
Note:  
*
When bit RE is cleared to 0 in SCR3 with the multiprocessor format, bit MPBR is not  
affected and retains its previous state.  
Bit 0: Multiprocessor bit transfer (MPBT)  
Bit 0 stores the multiprocessor bit added to transmit data when transmitting in asynchronous  
mode. The bit MPBT setting is invalid when synchronous mode is selected, when the  
multiprocessor communication function is disabled, and when not transmitting.  
Bit 0  
MPBT  
Description  
0
1
A 0 multiprocessor bit is transmitted  
A 1 multiprocessor bit is transmitted  
(initial value)  
282  
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