Si3035
Register 11. Chip Revision
Bit
D7
D6
D5
D4
D3
D2
REVA
R[3:0]
D1
D0
Name
Type
Reset settings = N/A
Bit
7:4
3:0
Name
Reserved
REVA[3:0]
Function
Read returns zero.
Chip Revision.
Four-bit value indicating the revision of the Si3021 (DSP-side) chip.
Register 12. Line Side Status
Bit
Name CLE FDT
Type R/W
Reset settings = N/A
D7
D6
D5
D4
D3
D2
D1
D0
LCS[3:0]
R
R
Bit
Name
Function
7
CLE
Communications (ISOcap Link) Error.
0 = ISOcap communication link between the Si3021 and the Si3012 is operating correctly.
1 = Indicates a communication problem between the Si3021 and the Si3012. A write of 0 or a
reset is required to clear this bit.
6
FDT
Frame Detect.
0 = Indicates ISOcap link has not established frame lock.
1 = Indicates ISOcap link frame lock has been established.
5:4
3:0
Reserved Read returns zero.
LCS[3:0] Loop Current Sense.
Four-bit value returning the loop current in 6 mA increments.
0 = Loop current < 0.4 mA typical.
1111 = Loop current > 155 mA typical.
See “Loop Current Monitor” on page 25.
40
Rev. 1.2
ETC [ ETC ]
