RTL8100C & RTL8100CL
Datasheet
Bit
R/W
Symbol
Description
5
R/W
Magic
Magic Packet.
This bit is valid when the PWEn bit of the CONFIG1 register is set.
The RTL8100C(L) will assert the PMEB signal to wakeup the
operating system when a Magic Packet is received.
Once the RTL8100C(L) has been enabled for Magic Packet wakeup,
it scans all incoming packets addressed to the node for a specific data
sequence that indicates to the controller that this is a Magic Packet. A
Magic Packet must also meet the basic requirements of:
Destination address + Source address + data + CRC.
The destination address may be the node ID of the receiving station or
a multicast address, which includes the broadcast address.
The specific sequence consists of 16 duplications of a 6-byte ID
register, with no breaks nor interrupts. This sequence can be located
anywhere within the packet, but must be preceded by a
synchronization stream, 6 bytes of FFh. The device will also accept a
multicast address, as long as the 16 duplications of the IEEE MAC
address match the address of the ID register.
If the Node ID is 11h 22h 33h 44h 55h 66h, then the magic packet’s
format is similar to the following:
Destination address + source address + MISC + FF FF FF FF FF FF +
MISC + 11 22 33 44 55 66 + 11 22 33 44 55 66 + 11 22 33 44 55 66 +
11 22 33 44 55 66 + 11 22 33 44 55 66 + 11 22 33 44 55 66 + 11 22 33
44 55 66 + 11 22 33 44 55 66 + 11 22 33 44 55 66 + 11 22 33 44 55 66
+ 11 22 33 44 55 66 + 11 22 33 44 55 66 + 11 22 33 44 55 66 + 11 22
33 44 55 66 + 11 22 33 44 55 66 + 11 22 33 44 55 66 + MISC + CRC
Link Up.
4
R/W
LinkUp
This bit is valid when the PWEn bit of CONFIG1 register is set. The
RTL8100C(L), when in an adequate power state, will assert the
PMEB signal to wakeup the operating system when the cable
connection is re-established.
3-1
0
-
R
-
Reserved.
Fast-Back-to-Back Enable.
FBtBEn
Set to 1 to enable Fast-Back-to-Back.
Single-Chip Fast Ethernet Controller
26
Track ID: JATR-1076-21 Rev. 1.06
ETC [ ETC ]
