欢迎访问ic37.com |
会员登录 免费注册
发布采购

RTL8100CL 参数 Datasheet PDF下载

RTL8100CL图片预览
型号: RTL8100CL
PDF下载: 下载PDF文件 查看货源
内容描述: 电源管理单芯片快速以太网控制器 [SINGLE-CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT]
分类和应用: 外围集成电路控制器LTE局域网以太网以太网:16GBASE-T
文件页数/大小: 73 页 / 652 K
品牌: ETC [ ETC ]
 浏览型号RTL8100CL的Datasheet PDF文件第29页浏览型号RTL8100CL的Datasheet PDF文件第30页浏览型号RTL8100CL的Datasheet PDF文件第31页浏览型号RTL8100CL的Datasheet PDF文件第32页浏览型号RTL8100CL的Datasheet PDF文件第34页浏览型号RTL8100CL的Datasheet PDF文件第35页浏览型号RTL8100CL的Datasheet PDF文件第36页浏览型号RTL8100CL的Datasheet PDF文件第37页  
RTL8100C & RTL8100CL  
Datasheet  
Bit  
R/W  
Symbol  
Description  
3
R
SPEED_10  
Speed. Set when current media is 10Mbps. Reset, when current media  
is 100Mbps.  
2
1
0
R
R
R
LINKB  
TXPF  
RXPF  
Inverse of Link status.  
0: Link OK  
1: Link Fail.  
Transmit Pause Flag.  
Set when the RTL8100C(L) sends a pause packet. Reset when the  
RTL8100C(L) sends a timer done packet.  
Receive Pause Flag.  
Set when the RTL8100C(L) is in backoff state because a pause packet  
was received.  
Reset when the pause state is cleared.  
5.21. CONFIG 3: Configuration Register3  
(Offset 0059h, R/W)  
Table 21. CONFIG 3: Configuration Register3  
Bit  
R/W  
Symbol  
Description  
7
R
GNTSel  
Grant Select.  
Sets the Frame’s asserted time after the Grant signal has been  
asserted. Frame and Grant are PCI signals.  
1: Delay one clock from GNT assertion  
0: No delay  
6
R/W  
PARM_En  
Parameter Enable (Used in 100Mbps mode only).  
0: The 9346CR register EEM1:0 = [1:1] will enable the  
PHY1_PARM, PHY2_PARM, and TW_PARM registers to be written  
via software.  
1: Allows parameters to be auto-loaded from the 93C46, and disables  
writing to PHY1_PARM, PHY2_PARM and TW_PARM registers  
via software. PHY1_PARM and PHY2_PARM can be auto-loaded  
from the EEPROM in this mode. The parameter auto-load process is  
executed each time the Link is OK in 100Mbps mode.  
Single-Chip Fast Ethernet Controller  
25  
Track ID: JATR-1076-21 Rev. 1.06