RTL8100C & RTL8100CL
Datasheet
5.38. RTL8100C(L) EEPROM Registers Summary
Table 38. RTL8100C(L) EEPROM Registers Summary
Offset Name
Type
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
00h-05h IDR0 – IDR5 R/W*
51h
52h
58h
63H
59h
5Ah
CONFIG0
CONFIG1
MSRBMCR
R
W*
R
-
-
-
-
-
-
-
BS2
-
BS1
-
BS0
-
-
-
LEDS1
LEDS1
TxFCE
LEDS0
LEDS0
RxFCE
DVRLOAD
DVRLOAD
-
LWACT
LWACT
-
MEMMAP IOMAP
VPD
VPD
PMEN
PMEN
W*
R
-
-
-
-
W*
R
TxFCE RxFCE
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Spd_Set
Spd_Set
Magic
Magic
LongWF
ANE
ANE
LinkUp
LinkUp
LWPME
-
-
-
-
-
FUDUP
FUDUP
FBtBEn
W*
R
CONFIG3
CONFIG4
GNTDel PARM_EN
W*
-
PARM_EN
-
-
-
R/W* RxFIFO AnaOff
AutoClr
LWPTN
78h-7Bh PHY1_PARM R/W**
7Ch-7Fh TW1_PARM R/W**
TW2_PARM
32-bit Read Write
32-bit Read Write
32-bit Read Write
8-bit Read Write
80h PHY2_PARM R/W**
D8h
CONFIG5
R/W*
-
-
-
-
-
LDPS LAN PME_STS
Wake
*
*
Registers marked 'W ' can be written only if bits EEM1:0 = [1:1].
**
** Registers marked 'W ' can be written only if bits EEM1:0 = [1:1] and CONFIG3<PARM_EN> = 0.
5.39. EEPROM Power Management Registers Summary
Table 39. EEPROM Power Management Registers Summary
Configuration Name
Space Offset
Type
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2 Bit1
Bit0
52h
53h
55h
PMC
R
R
R
Aux_I_b1
PME_D3cold
PME_Status
PME_Status
Aux_I_b0
DSI
Reserved PMECLK
Version
PME_D3hot PME_D2 PME_D1 PME_D0
D2
D1
Aux_I_b2
PME_En
PME_En
PMCSR
-
-
-
-
-
-
-
-
-
-
-
-
W
Single-Chip Fast Ethernet Controller
37
Track ID: JATR-1076-21 Rev. 1.06
ETC [ ETC ]
