Table 6.5
Mnemonic
L64777 Pin Description Summary (Cont.)
Drive
(mA) Active
Description
Type
FTMODE[2:0]
GND
Functional Test Mode Input w/Pulldown
–
–
–
HIGH
–
Ground
Analog
ICLK
Input Clock
TTL Input
LOW/
HIGH
IDDTN
INT_n
IREF1
IREF2
IDD Test
TTL Input
w/Pullup
–
4
–
–
LOW
LOW
–
Interrupt Request
Open Drain,
Driving Low
Reference Current
Input
Analog Input
Analog Input
Output
Reference Current
Input
–
NT_OUT
OCLK
Nand Tree
4
–
HIGH
VCO Clock Output or Bidirectional
External Clock Input
LOW/
HIGH
PCLK
Clock Input for PLL
Mode 2
TTL input
–
HIGH
PLL_MODE[1:0] Select PLL Mode
Input w/Pulldown
–
4
HIGH
PLL_OUT_CS
PLL Current Source 3-state Current
Source
3-state
QAM_I
Positive DAC Output Analog Output
I Channel
–
–
–
–
–
–
–
–
QAM_In
Negative DAC Output Analog Output
I Channel
QAM_Q
Positive DAC Output Analog Output
Q Channel
QAM_QN
Negative DAC Output Analog Output
Q Channel
RESET_n
Chip Reset
TTL Input
–
–
LOW
SB_BASE[1:0]
Serial Bus Base
Address Selector
Input w/Pulldown
HIGH
6-6
Specifications
ETC [ ETC ]
