Table 6.5
Mnemonic
L64777 Pin Description Summary (Cont.)
Drive
(mA) Active
Description
Type
SCAN_ENABLE Scan Enable
TTL Input
w/Pulldown
–
4
4
4
HIGH
HIGH
SCL
Serial Control Line
Input
(5 V-tolerant)
SCLK
SDA
Symbol Clock Output Output
LOW/
HIGH
Serial Data Access
Bidirectional
(5 V-tolerant)
Open-
drain
SSTARTIN
SYNCOK
TCK
Sequence Start Input TTL Input
Sync Detection Flag Output
–
4
–
HIGH
HIGH
1
JTAG Test Clock
TTL Input
w/Pulldown
+
TDI
JTAG Test Data In
TTL Input
w/Pulldown
–
HIGH
TDO
TMS
JTAG Test Data Out Output
4
–
HIGH
HIGH
JTAG Test Mode
Select
TTL Input
w/Pulldown
TNn
3-State Mode
TTL Input
w/Pullup
–
–
–
–
LOW
LOW
–
TRSTn
VDDX_I
VDDX_Q
JTAG Test Reset
TTL Input
w/Pulldown
Supply for Digital
DAC Part
Analog Input
Supply for Digital
DAC Part
Analog Input
–
VREF_I
Voltage Reference
Voltage Reference
Analog
Analog
–
–
–
–
VREF_Q
1. Also 5 V compatible.
Pin Descriptions and Lists
6-7
ETC [ ETC ]
