Version: 1.18
PRELIMINARY/CONFIDENTIAL
TrueSpeech® Co-Processor
4 Host Controller Interface
4.1 8 Or 16-Bit Host Controller Interface
The operation of the CT8022 is controlled via 8 16-bit registers that provide a control/status/data interface. This
interface is accessed physically as 16 8-bit wide I/O locations mapped into the Host controller address space. This
allows the CT8022 to be used with inexpensive 8 bit micro-controllers or more powerful 16/32-bit microprocessors.
The Host controls the CT8022 by writing control words to the CT8022 registers and it obtains status information by
reading the CT8022 status registers. Speech data is passed through the receive/transmit buffer registers when
recording or playing speech data to or from the Host. Receive and transmit data buffers are 16 words deep and
Host-controllable. In addition, the CT8022 provides either single-cycle or continuous (burst) DMA modes for both
half-duplex and full-duplex speech transfers.
4.2
Host Interface Signals
Active low: asserted by the Host to read from the CT8022
Active low: asserted by the Host to write to the CT8022
Active low: Chip Select, asserted by the Host to enable the HSTRDN,
HSTWRN signals
HSTRDN:
HSTWRN:
HSTCSN:
Host Address lines, select the Host interface register read or written
8 bit Host data bus to transfer data to/from the CT8022
Active low: Dedicated Host interrupt request (replaces CT8015 ACK signal)
TX DMA request (associated with data write buffer)
Active low: TX DMA acknowledge
HSTAB3-0:
HSTDB7-0:
IRQN:
TXDREQ:
TXDACKN:
RXDREQ:
RXDACKN:
RX DMA request (associated with data read buffer)
Active low: RX DMA acknowledge
CT8022A11AQC FW Revision 0118 DSP GROUP, INC., 3120 SCOTT BOULEVARD
SANTA CLARA, CA 95054 PH: 408 986 – 4300 FAX: 408 986 – 4490
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All specifications are subject to change without prior notice.
ETC [ ETC ]
