Z80180/Z8S180/Z8L180
Enhanced Z180 Microprocessor
Zilog
CSI/O CLock
56
56
Transmit data
(Internal Clock)
57
57
Transmit data
(External Clock)
11tcyc
58
11tcyc
58
59
59
Receive data
(Internal Clock)
16.5tcyc
16.5tcyc
11.5tcyc
11.5tcyc
Receive data
(External Clock)
60
61
60
61
Figure 29. CSI/O Receive/Transmit Timing
65
66
70
69
V
V
IH1
IH1
EXTAL V
V
IL1
IL1
Input Rise Time and Fall Time
(Except EXTAL, /RESET)
External Clock Rise Time and Fall Time
Figure 30. Rise Time and Fall Times
1-34
P R E L I M I N A R Y
DS971800401