Z8 Encore!® Motor Control Flash MCUs
Product Specification
76
Table 43. PWM Low Byte Register (PWML)
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
PWML
00H
R/W
F2DH
ADDR
PWMH and PWML—PWM High and Low Bytes
These 2 bytes, {PWMH[3:0], PWML[7:0]}, contain the current 12-bit PWM count value.
PWM Reload High and Low Byte Registers
The PWM Reload High and Low Byte (PWMRH and PWMRL) registers, shown in Table
44 and Table 45, store a 12-bit reload value, {PWMRH[3:0], PWMRL[7:0]}. The PWM
reload value is held in buffer registers. The PWM reload value written to the buffer regis-
ters is not used by the PWM generator until the next PWM reload event occurs. Reads
from these registers always return the values from the buffer registers.
Prescaler x Reload Value
Edge-Aligned PWM Mode Period =
fPWMCLK
2 x Prescaler x Reload Value
Center-Aligned PWM Mode Period =
fPWMCLK
Table 44. PWM Reload High Byte Register (PWMRH)
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
Reserved
0H
PWMRH
FH
R/W
R/W
F2EH
ADDR
Pulse-Width Modulator
P R E L I M I N A R Y
PS024604-1005
ZILOG [ ZILOG, INC. ]
