Z8FMC16100 Series Flash MCU
Product Specification
17
Register File Address Map
Table 5 provides the address map for the Register File of the Z8FMC16100 Series Flash
MCU.
Table 5. Register File Address Map
Address
(Hex)
Register Description
Mnemonic
Reset (Hex)
Page #
General Purpose RAM—Z8FMC16 devices with 512B On-Chip RAM
000–1FF General-Purpose Register File RAM
200–EFF Reserved
—
—
XX
XX
13
Timer 0
F00
F01
F02
F03
F04
F05
F06
F07
F08
F09
Timer 0 High Byte Register (T0H)
T0H
T0L
00
01
FF
FF
00
00
00
00
XX
XX
XX
103
103
104
104
105
105
106
107
208
209
Timer 0 Low Byte Register (T0L)
Timer 0 Reload High Byte Register (T0RH)
Timer 0 Reload Low Byte Register (T0RL)
Timer 0 PWM High Byte Register (T0PWMH)
Timer 0 PWM Low Byte Register (T0PWML)
Timer 0 Control 0 Register (T0CTL0)
Timer 0 Control 1 Register (T0CTL1)
ADC Timer 0 Capture Register, High Byte
ADC Timer 0 Capture Register, Low Byte
T0RH
T0RL
T0PWMH
T0PWML
T0CTL0
T0CTL1
ADCTCAP_H
ADCTCAP_L
—
F0A–F1F Reserved
Pulse-Width Modulator
F20
F21
F22
F23
F24
F25
PWM Control 0 Register
PWMCTL0
PWMCTL1
PWMDB
00
00
00
00
00
78
80
81
82
82
83
PWM Control 1 Register
PWM Deadband Register
PWM Minimum Pulse Width Filter
PWM Fault Mask Register
PWM Fault Status Register
PWMMPF
PWMFM
PWMFSTAT X0X0-0XXXb
Note: XX = undefined.
PS024604-1005
P R E L I M I N A R Y
ZILOG [ ZILOG, INC. ]
