Z8FMC16100 Series Flash MCU
Product Specification
319
Hex Address: F24
PWM Fault Mask Register (PWMFM)
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
Reserved
DBGMSK
Reserved
000
F1MASK C0MASK
FMASK
00
R
0
0
0
0
R/W
R
R/W
R/W
R/W
F24H
ADDR
Bit
Value
(H)
Description
Position
[7:6]
Must be 0.
Reserved
[5]
Debug Entry Fault Mask
DBGMSK
0
1
Entering CPU DEBUG Mode generates a PWM fault.
Entering CPU DEBUG mode does not generate a PWM fault.
[4:3]
Must be 0.
Reserved
[2]
Fault 1 Fault Mask
F1MASK
0
1
Fault 1 generates a PWM fault.
Fault 1 does not generate a PWM fault.
[1]
Comparator Fault Mask
C0MASK
0
1
Comparator generates a PWM fault.
Comparator does not generate a PWM fault.
[0]
Fault Pin Mask
F0MASK
0
1
Fault0 pin generates a PWM fault.
Fault0 pin does not generate a PWM fault.
Note: This register can only be written when PWENis cleared.
PS024604-1005
P R E L I M I N A R Y
Appendix A—Register Tables
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