Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!®
54
Table 33. IRQ2 Enable High Bit Register (IRQ2ENH)
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
T3ENH
U1RENH U1TENH DMAENH
C3ENH
C2ENH
C1ENH
C0ENH
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FC7H
ADDR
T3ENH—Timer 3 Interrupt Request Enable High Bit
U1RENH—UART 1 Receive Interrupt Request Enable High Bit
U1TENH—UART 1 Transmit Interrupt Request Enable High Bit
DMAENH—DMA Interrupt Request Enable High Bit
C3ENH—Port C3 Interrupt Request Enable High Bit
C2ENH—Port C2 Interrupt Request Enable High Bit
C1ENH—Port C1 Interrupt Request Enable High Bit
C0ENH—Port C0 Interrupt Request Enable High Bit
Table 34. IRQ2 Enable Low Bit Register (IRQ2ENL)
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
T3ENL
U1RENL
U1TENL DMAENL
C3ENL
C2ENL
C1ENL
C0ENL
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FC8H
ADDR
T3ENL—Timer 3 Interrupt Request Enable Low Bit
U1RENL—UART 1 Receive Interrupt Request Enable Low Bit
U1TENL—UART 1 Transmit Interrupt Request Enable Low Bit
DMAENL—DMA Interrupt Request Enable Low Bit
C3ENL—Port C3 Interrupt Request Enable Low Bit
C2ENL—Port C2 Interrupt Request Enable Low Bit
C1ENL—Port C1 Interrupt Request Enable Low Bit
C0ENL—Port C0 Interrupt Request Enable Low Bit
Interrupt Edge Select Register
The Interrupt Edge Select (IRQES) register (Table 35) determines whether an interrupt is
generated for the rising edge or falling edge on the selected GPIO Port input pin. The
PS017610-0404
Interrupt Controller