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Z8F1602AR020EC 参数 Datasheet PDF下载

Z8F1602AR020EC图片预览
型号: Z8F1602AR020EC
PDF下载: 下载PDF文件 查看货源
内容描述: Z8喝采微控制器与闪存和10位A / D转换器 [Z8 Encore Microcontrollers with Flash Memory and 10-Bit A/D Converter]
分类和应用: 转换器闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 246 页 / 1767 K
品牌: ZILOG [ ZILOG, INC. ]
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Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x  
Z8 Encore!®  
52  
Table 28. IRQ0 Enable Low Bit Register (IRQ0ENL)  
BITS  
FIELD  
RESET  
R/W  
7
6
5
4
3
2
1
0
T2ENL  
T1ENL  
T0ENL  
U0RENL  
U0TENL  
I2CENL  
SPIENL  
ADCENL  
0
0
0
0
0
0
0
0
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
FC2H  
ADDR  
T2ENL—Timer 2 Interrupt Request Enable Low Bit  
T1ENL—Timer 1 Interrupt Request Enable Low Bit  
T0ENL—Timer 0 Interrupt Request Enable Low Bit  
U0RENL—UART 0 Receive Interrupt Request Enable Low Bit  
U0TENL—UART 0 Transmit Interrupt Request Enable Low Bit  
I2CENL—I2C Interrupt Request Enable Low Bit  
SPIENL—SPI Interrupt Request Enable Low Bit  
ADCENL—ADC Interrupt Request Enable Low Bit  
IRQ1 Enable High and Low Bit Registers  
The IRQ1 Enable High and Low Bit registers (Tables 30 and 31) form a priority encoded  
enabling for interrupts in the Interrupt Request 1 register. Priority is generated by setting  
bits in each register. Table 29 describes the priority control for IRQ1.  
Table 29. IRQ1 Enable and Priority Encoding  
IRQ1ENH[x] IRQ1ENL[x] Priority  
Description  
Disabled  
Low  
0
0
1
1
0
1
0
1
Disabled  
Level 1  
Level 2  
Level 3  
Nominal  
High  
where x indicates the register bits from 0 through 7.  
PS017610-0404  
Interrupt Controller