Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!®
42
Table 19. Port A-H STOP Mode Recovery Source Enable Sub-Registers
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
PSMRE7
PSMRE6
PSMRE5
PSMRE4
PSMRE3
PSMRE2
PSMRE1
PSMRE0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
If 05H in Port A-H Address Register, accessible via Port A-H Control Register
ADDR
PSMRE[7:0]—Port STOP Mode Recovery Source Enabled
0 = The Port pin is not configured as a STOP Mode Recovery source. Transitions on this
pin during Stop mode do not initiate STOP Mode Recovery.
1 = The Port pin is configured as a STOP Mode Recovery source. Any logic transition on
this pin during Stop mode initiates STOP Mode Recovery.
Port A-H Input Data Registers
Reading from the Port A-H Input Data registers (Table 20) returns the sampled values
from the corresponding port pins. The Port A-H Input Data registers are Read-only.
Table 20. Port A-H Input Data Registers (PxIN)
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
PIN7
PIN6
PIN5
PIN4
PIN3
PIN2
PIN1
PIN0
X
R
X
R
X
R
X
R
X
R
X
R
X
R
X
R
FD2H, FD6H, FDAH, FDEH, FE2H, FE6H, FEAH, FEEH
ADDR
PIN[7:0]—Port Input Data
Sampled data from the corresponding port pin input.
0 = Input data is logical 0 (Low).
1 = Input data is logical 1 (High).
PS017610-0404
General-Purpose I/O
ZILOG [ ZILOG, INC. ]
