Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!®
41
Port A-H High Drive Enable Sub-Registers
The Port A-H High Drive Enable sub-register (Table 18) is accessed through the Port A-H
Control register by writing 04Hto the Port A-H Address register. Setting the bits in the
Port A-H High Drive Enable sub-registers to 1 configures the specified port pins for high
current output drive operation. The Port A-H High Drive Enable sub-register affects the
pins directly and, as a result, alternate functions are also affected.
Table 18. Port A-H High Drive Enable Sub-Registers
BITS
FIELD
RESET
R/W
7
6
5
4
3
2
1
0
PHDE7
PHDE6
PHDE5
PHDE4
PHDE3
PHDE2
PHDE1
PHDE0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
If 04H in Port A-H Address Register, accessible via Port A-H Control Register
ADDR
PHDE[7:0]—Port High Drive Enabled
0 = The Port pin is configured for standard output current drive.
1 = The Port pin is configured for high output current drive.
Port A-H Stop Mode Recovery Source Enable Sub-Registers
The Port A-H STOP Mode Recovery Source Enable sub-register (Table 19) is accessed
through the Port A-H Control register by writing 05Hto the Port A-H Address register.
Setting the bits in the Port A-H STOP Mode Recovery Source Enable sub-registers to 1
configures the specified Port pins as a STOP Mode Recovery source. During STOP Mode,
any logic transition on a Port pin enabled as a STOP Mode Recovery source initiates
STOP Mode Recovery.
PS017610-0404
General-Purpose I/O
ZILOG [ ZILOG, INC. ]
