Z8018x Family
MPU User Manual
293
I/O Registers
INTERNAL I/O REGISTERS
By programming IOA7 and IOA6 as the I/O control register, internal I/O
register addresses are relocatable within ranges from0000H to 00FFH in
the I/O address space.
Table 57. Internal I/O Registers
Register
Mnemonics Address
Remarks
ASCI Control Register A CNTLA0
Channel 0:
0
0
MPBR/
MPE
TE
MOD2
MOD1 MOD0
RE
RTS0
bit
during RESET
R/W
EFR
1
0
0
0
0
0
0
invalid
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MODE Selection
Multi Processor Bit Receive/
1
Error Flag Reset
Request to Send
Transmit Enable
Receive Enable
Multi Processor Enable
ASCI Control Register A CNTLA1
Channel 1:
0
1
MPBR/
CKA1D
MPE
bit
RE
0
TE
0
MOD2
MOD0
MOD1
0
EFR
during RESET
R/W
1
0
invalid
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MODE Selection
Multi Processor Bit Receive/
Error Flag Reset
CKA1 Disable
Transmit Enable
Receive Enable
Multi Processor Enable
2 1 0
0 0 0 Start + 7 bit Data + 1 Stop
0 0 1 Start + 7 bit Data + 2 Stop
MOD
0 1 0 Start + 7 bit Data + Parity + 1 Stop
0 1 1 Start + 7 bit Data + Parity + 2 Stop
1 0 0 Start + 8 bit Data + 1 Stop
1 0 1 Start + 8 bit Data + 2 Stop
1 1 0 Start + 8 bit Data + Parity + 1 Stop
1 1 1 Start + 8 bit Data + Parity + 2 Stop
UM005001-ZMP0400
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