Z8018x Family
MPU User Manual
211
DATA MANIPULATION INSTRUCTIONS
Table 38. Arithmetic and Logical Instructions (8-bit)
Flags
Addressing
Immed Ext Ind Reg RegI Imp Rel Bytes States Operation
7
6
Z
4
2
1
0
Operation
Name
Mnemonics
Op Code
S
H
P/V
N
C
ADD
ADD A,g
10 000 g
10 000 110
11 000 110
<m>
S
D
D
D
1
1
2
4
6
6
Ar + gr® Ar
•
•
•
•
•
•
•
•
•
V
V
V
R
R
R
•
•
•
ADD A, (HL)
ADD A, m
S
Ar + (HL) ® Ar
M
S
Ar + m® Ar
ADD A,(IX + d) 11 011 101
S
S
D
D
3
3
14
14
Ar + (IX + d) ® Ar
•
•
•
•
•
•
V
V
R
R
•
•
M
10 000 110
<d>
ADD A,(IY + d) 11 111 101
10 000 I10
Ar + (IY + d)) ® Ar
M
<d>
ADC
ADC A,g
10 001 g
10 001 110
11 001 110
<m>
S
D
D
D
1
1
2
4
6
6
Ar + gr + c® Ar
•
•
•
•
•
•
•
•
•
V
V
V
R
R
R
•
•
•
ADC A,(HL)
ADC A,m
S
Ar + (HL) + c® Ar
M
S
Ar + m + c® Ar
ADC A,(IX + d) 11 011 101
S
S
D
3
14
Ar + (lX + d))
c® Ar
+
+
•
•
•
V
R
•
M
10 001 110
<d>
ADC A,(IY + d) 11 111 101
D
3
14
Ar + (IY + d))
c® Ar
•
•
•
V
R
•
M
10 001 110
<d>
UM005001-ZMP0400
ZILOG [ ZILOG, INC. ]
