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Z8018008VSC 参数 Datasheet PDF下载

Z8018008VSC图片预览
型号: Z8018008VSC
PDF下载: 下载PDF文件 查看货源
内容描述: 家庭MPU [Family MPU]
分类和应用:
文件页数/大小: 326 页 / 1089 K
品牌: ZILOG [ ZILOG, INC. ]
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Z8018x Family  
MPU User Manual  
125  
ASCI Control Register A0, 1 (CNTLA0, 1)  
Each ASCI channel Control Register A configures the major operating  
modes such as receiver/transmitter enable and disable, data format, and  
multiprocessor communication mode.  
ASCI Control Register A 0 (CNTLA0: 00H)  
Bit  
7
6
5
4
3
2
1
0
Bit/Field  
MPE  
RE  
TE  
RTS0  
MPBR/ MOD2  
EFR  
MOD1 MOD0  
R/W  
R/W  
0
R/W  
0
R/W  
0
R/W  
1
R/W  
X
R/W  
0
R/W  
0
R/W  
0
Reset  
Note: R = Read W = Write X = Indeterminate ? = Not Applicable  
Bit  
Position Bit/Field R/W  
Value Description  
7
MPE R/W  
Multi-Processor Mode Enable — The ASCI has a  
multiprocessor communication mode which utilizes an  
extra data bit for selective communication when a number  
of processors share a common serial bus. Multiprocessor  
data format is selected when the MP bit in CNTLB is set  
to 1. If multiprocessor mode is not selected (MP bit in  
CNTLB = 0), MPE has no effect. If multiprocessor mode  
is selected, MPE enables or disables the wakeup feature  
as follows. If MPE is set to 1, only received bytes in  
which the MPB (multiprocessor bit) is 1 can affect the  
RDRF and error flags. Effectively, other bytes (with MPB  
is 0) are ignored by the ASCI. If MPE is reset to 0, all  
bytes, regardless of the state of the MPB data bit, affect  
the RDRF and error flags.  
UM005001-ZMP0400  
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