eZ80L92 MCU
Product Specification
63
T
WAIT
T1
T2
T3
T4
System Clock
ADDR[23:0]
DATA[7:0]
CSx
ALE
WR
READY
RD
MREQ
or IORQ
®
Figure 13. Intel Bus Mode Write Timing Example (Multiplexed Address and Data Bus)
Motorola Bus Mode
Chip selects configured for Motorola Bus Mode modify the eZ80 bus signals to duplicate
an eight-state memory transfer similar to that found on Motorola-style microprocessors.
The bus signals (and ZLP12840 I/O pins) are mapped as illustrated in Figure 14.
PS013015-0316
Chip Selects and Wait States