ZL50022
Data Sheet
AC Electrical Characteristics† - ST-BUS/GCI-Bus Output Tristate Timing
Characteristic
Sym.
Min.
Typ.
Max.
Units
Test Conditions*
1
2
3
STio Delay - Active to High-Z
tDZ
-2
-3
-8
-2
-3
-8
8
7
0
8
7
0
ns
ns
ns
ns
ns
ns
Master Mode
Multiplied Slave Mode
Divided Slave Mode
STio Delay - High-Z to Active
tZD
Master Mode
Multiplied Slave Mode
Divided Slave Mode
Output Drive Enable (ODE) Delay
- High-Z to Active
tZD_ODE
Master or
77
ns
Multiplied Slave Mode
CKi @ 4.096MHz
CKi @ 8.192MHz
CKi @ 16.384MHz
260
138
77
ns
ns
ns
Divided Slave Mode
4
Output Drive Enable (ODE) Delay
- Active to High-Z
tDZ_ODE
Master or
77
ns
Multiplied Slave Mode
CKi @ 4.096MHz
CKi @ 8.192MHz
CKi @ 16.384MHz
260
138
77
ns
ns
ns
Divided Slave Mode
† Characteristics are over recommended operating conditions unless otherwise stated.
* Test condition is RL = 1 k, CL = 30 pF; high impedance is measured by pulling to the appropriate rail with RL, with timing corrected to cancel
the time taken to discharge CL.
VCT
FPo0
CKo0
VCT
tDZ
VCT
Tristate
Valid Data
STio
tZD
VCT
Tristate
Valid Data
STio
Figure 39 - Serial Output and External Control
VCT
ODE
STio
tZD_ODE
HiZ
tDZ_ODE
Valid Data
VCT
HiZ
Figure 40 - Output Drive Enable (ODE)
106
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
