ZL38001
Data Sheet
External Read/Write Address: 01H
Reset Value: 00H
7
6
5
4
3
2
1
0
SHFT
ASC-
NLP-
INJ-
HPF-
HCLR
ADAPT-
ECBY
Bit
Name
Description
1
ADAPT-
When high, the Echo canceller adaptation is disabled and when low the
adaptation is enabled.
0
ECBY
When high, the Echo estimate from the filter is not substracted from the input
(Rin), when low the estimate is substracted.
Register Table 3 - Line Echo Canceller Control Register (LEC) (continued)
External Read Address: 22H
Reset Value: 00H
7
6
5
4
3
2
1
0
-
ACMUND
HWLNG
-
NLPDC
DT
NB
NBS
Bit
Name
Description
7
6
5
-
RESERVED.
ACMUND
HWLNG
When low, No active signal in the Rin/Rout path.
When high, Howling is occurring in the loop and when low, no Howling is
detected.
4
3
2
-
RESERVED.
NLPDC
DT
When high, the NLP is activated and when low the NLP is not activated.
When high the Double Talk is detected and when low, the Double talk is not
detected.
1
0
NB
LOGICAL OR of the status bit NBS + NBR from LSR Register.
NBS
When high, the Narrowband signal has been detected in the Sin/Sout path
and when low, the Narrowband signal has not been detected in the Sin/Sout
path.
Register Table 4 - Acoustic Echo Canceller Status Register (ASR) (* Do not write to this register)
31
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
