MT9196
Data Sheet
C-Channel Register
ADDRESS = 14h WRITE/READ
Power Reset Value
1111 1111
B7
7
B6
6
B5
5
B4
4
B3
B2
2
B1
1
B0
0
3
Micro-port access to the ST-BUS C-Channel information
D-Channel Register
ADDRESS = 15h WRITE/READ
Power Reset Value
1111 1111
D3
3
D6
6
D5
5
D4
4
D2
D1
D0
D7
7
2
1
0
ADDRESS = 16h RESERVED
Loopback Register
ADDRESS = 17h WRITE/READ VERIFY
Power Reset Value
XX00 XXXX
-
-
Loop2 Loop1
-
-
-
-
7
6
5
4
3
2
1
0
Loop1
Loop2
Notes:
When high, the selected B-channel in ST-BUS mode (i.e., B2/B1 and Transmit and Receive Path selections) or the strobed
B-channel in SSI mode is looped back from Din to Dout through the FDI block. The C & D channels (ST-BUS mode) are not
looped back. When low, the device operates normally.
When high, Loop1 is invoked with the transmit and receive digital gain adjustment being included. This loopback should only
be used if PCM resides in the B-channel. If a data pattern is being looped back then use Loop1 or use Loop2 after ensuring
that the transmit and receive digital gain registers are set to 0dB (address 19h). When low, the device operates normally.
1)
2)
3)
do not enable Loop1 and Loop2 simultaneously.
both loopback modes add an extra frame delay to the data transmission.
ensure that all other bits of address 17h are written logic low when accessing this register.
Note: Bits marked "-" are reserved bits and should be written with logic "0".
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Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
