MT9196
Data Sheet
DTMF/Tone Ringer Control Register
ADDRESS = 18h WRITE/READ VERIFY
Power Reset Value
DTMF Ring
0000 XXX0
-
HiEN
7
LoEN
6
-
-
WR
En
St EN
5
4
3
2
1
0
HiEN, LoEN
DTMF St EN
Ring EN
When high, the programmed tone, for the respective high or low group, is generated. When low, tone generation is
disabled for the respective low or high group.
When high, programmed DTMF is muxed into the receive path replacing the receive PCM signal. When low, the
receive path functions normally.
When high, the tone ringer generator is enabled using the coefficients at addresses 1Ah and 1Bh as well as the WR
control bit. For the ringer tone to be applied to the loudspeaker the proper path must be selected via the Receive
Path Control Register (address 13h). When low, the ring generator circuit is disabled.
WR
When high, the tone ringer circuit will toggle between the two programmed frequencies at a 5 Hz rate. When low, the
tone ringer warble rate is 10Hz.
Digital Gain Register
ADDRESS = 19h WRITE/READ VERIFY
Power Reset Value
1000 1000
TxG3
7
TxG2
TxG1 TxG0
RxG3
3
RxG2
2
RxG1 RxG0
6
5
4
1
0
Transmit (TxG3-0) and receive (RxG3-0) control bits for programming gain in 3 dB increments.
RxG3
RxG2
RxG1
RxG0
Gain Adjustment (dB)
TxG3
TxG2
TxG1
TxG0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
-24
-21
-18
-15
-12
-9
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
-6
-3
0
+3
+6
+9
+12
+15
+18
+21
Low Tone Coefficient Register
ADDRESS = 1Ah WRITE/READ VERIFY
Power Reset Value
0000 0000
L7
7
L6
6
L5
5
L4
4
L3
3
L2
2
L1
1
L0
0
The frequency of the low group tone is programmed by writing an 8-bit hexadecimal coefficient at this address according to the following
equation:
Frequency (in Hz) = 7.8125 x COEFF
Where the hexadecimal COEFF is converted into a decimal integer between 0 and 255. Frequency resolution is 7.8125Hz in the range
0 to 1992 Hz.
Note: Bits marked "-" are reserved bits and should be written with logic "0".
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Zarlink Semiconductor Inc.