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MT9196ASR1 参数 Datasheet PDF下载

MT9196ASR1图片预览
型号: MT9196ASR1
PDF下载: 下载PDF文件 查看货源
内容描述: 综合数字电话电路( IDPC ) [Integrated Digital Phone Circuit (IDPC)]
分类和应用: 电话电路PC
文件页数/大小: 46 页 / 636 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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MT9196  
Data Sheet  
High Tone Coefficient Register  
ADDRESS = 1Bh WRITE/READ VERIFY  
Power Reset Value  
H7  
H6  
H5  
H4  
4
H3  
3
H2  
2
H1  
1
H0  
0000 0000  
7
6
5
0
The frequency of the high group tone is programmed by writing an 8-bit hexadecimal coefficient at this address according to the  
following equation:  
Frequency (in Hz) = 7.8125 x COEFF  
Where the hexadecimal COEFF is converted into a decimal integer between 0 and 255. Frequency resolution is 7.8125Hz in the range  
0 to 1992 Hz.  
ADDRESS = 1Ch WRITE/READ VERIFY  
Anti-Howl Control Register  
Power Reset Value  
0X10 X100  
Pad0  
Enable  
7
-
MS1  
5
MS0  
4
Pad2  
2
Pad1  
1
-
6
3
0
Enable  
When high, the anti-howling circuit is enabled. When low, the anti-howling circuit is disabled.  
MS1, MS0  
Encode the operational mode of the anti-howling circuit as follows. Details of each mode are found in the functional  
description of the anti-howling circuit.  
MS1  
MS0  
Operational Mode  
0
0
1
1
0
1
0
1
Transmit Noise Squelch  
Receive Noise Squelch  
Anti-howling for group listening  
Tx/Rx Switched Loss  
Pad2-0  
Three bits encoding the attenuation depth which will be switched into the transmit or receive paths by the anti-howling  
circuit. Note that 12 dB is the default value.  
Pad2  
Pad1  
Pad0  
Attenuation (dB)  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
3
6
9
12  
15  
18  
21  
High Threshold Register  
ADDRESS = 1Dh WRITE/READ VERIFY  
Power Reset Value  
-
THh6  
THh5  
5
THh4  
THh3  
THh2  
2
THh1  
THh0  
X011 0000  
7
6
4
3
1
0
THh6-0  
Seven bits encoding the magnitude of the high threshold level. Encoding is in PCM sign-magnitude excluding the sign bit.  
THh0 - THh3 encode the step number while THh4 - THh6 encode the chord number. The default setting of 'X011 0000'  
encodes chord 3 step 0. The difference between the high and low thresholds defines the hysteresis for anti-howling.  
Low Threshold Register  
ADDRESS = 1Eh WRITE/READ VERIFY  
Power Reset Value  
-
THI6  
THI5  
5
THI4  
4
THI3  
3
THI2  
2
THI1  
1
THI0  
X001 0100  
7
6
0
THl6-0  
Seven bits encoding the magnitude of the low threshold level. Encoding is in PCM sign-magnitude excluding the sign bit.  
THl0 - THl3 encode the step number while THl4 - THl6 encode the chord number. The default setting of 'X001 0100'  
encodes chord 1 step 4. The difference between the high and low thresholds defines the hysteresis for anti-howling.  
ADDRESSES 1Fh to 3Fh are RESERVED  
Note: Bits marked "-" are reserved bits and should be written with logic "0".  
27  
Zarlink Semiconductor Inc.  
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