MT9196
Data Sheet
IDPC Register Map
00
•
•
RESERVED
•
09
0A
0B
0C
0D
0E
0F
-
RxFG
RxFG1 RxFG0
Gain1 Gain0
-
-
TxFG2
STG2
TxFG1
STG1
TxFG0
STG0
FCodec Control 1
FCodec Control 2
2
Gain3
Gain2
---------------------------------------RESERVED----------------------------------
---------------------------------------RESERVED----------------------------------
PD
Tfhp
-
DialEn
-
-
B2/B1
RxMute TxMute
Control Register 1
Control Register 2
RST
A/µ
Smag/ RxINC TxINC
CCITT
-
-
10
-
ST-BUS/
SSI
CEN
DEN
D
Asynch/
Synch
CSL1
CSL0
FDI Control
8
11
12
13
14
15
16
17
18
-
-
-
W4
-
W3
b3
W2
b2
W1
b1
W0
b0
Watchdog
-
-
-
Tx Path Control
Rx Path Control
C-Channel Register
D-Channel Register
b7
b7
D7
b6
b6
D6
b5
b5
D5
b4
b4
D4
b3
b2
b1
b0
b3
b2
b1
b0
D3
D2
D1
D0
---------------------------------------RESERVED----------------------------------
-
-
Loop2
Loop1
-
-
-
-
-
-
-
Loopback Register
DTMF/Tone Ringer
HiEN
LoEn
DTMF Ring En
StEn
WR
19
1A
1B
1C
1D
1E
TxG3
TxG2
L6
TxG1
L5
TxG0
L4
RxG3
L3
RxG2
L2
RxG1
L1
RxG0
L0
Digital Gain
Low Tone Coeff
High Tone Coeff
Anti-Howl Control
High Threshold
Low Threshold
L7
H7
H6
H5
H4
H3
H2
H1
H0
Enable
-
MS1
THh5
THl5
MS0
THh4
THl4
-
Pad2
THh2
THl2
Pad1
THh1
THl1
Pad0
THh0
THl0
-
-
THh6
THl6
THh3
THl3
1F
•
•
RESERVED
•
3F
20
Zarlink Semiconductor Inc.